AUIRF3504
HEXFET® Power MOSFET
08/30/11
www.irf.com 1
PD - 97696A
S
D
G
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in
the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Ambient temperature (TA) is 25°C, unless otherwise specified.
G
D
S
Gate
Drain
Source
TO-220AB
AUIRF3504
S
D
G
D
AUTOMOTIVE GRADE
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
Features
lAdvanced Planar Technology
lLow On-Resistance
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
lRepetitive Avalanche Allowed
up to Tjmax
lLead-Free, RoHS Compliant
lAutomotive Qualified*
Description
Specifically designed for Automotive applications,
this Stripe Planar design of HEXFET® Power
MOSFETs utilizes the latest processing techniques
to achieve low on-resistance per silicon area. This
benefit combined with the fast switching speed and
ruggedized device design that HEXFET power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in Automotive and a wide variety of other applications.
Parameter Units
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C
= 100°C Continuous Drain Current, VGS @ 10V A
I
DM
Pulsed Drain Current
c
P
D
@T
C
= 25°C Power Dissipation W
Linear Derating Factor W/°C
V
GS
Gate-to-Source Voltage V
E
AS
Single Pulse Avalanche Energy (Thermally Limited)
d
mJ
E
AS
(tested) Single Pulse Avalanche Energy Tested Value
i
I
AR
Avalanche Current
c
A
E
AR
Repetitive Avalanche Energy
h
mJ
T
J
Operating Junction and
T
STG
Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case )
Mounting Torque, 6-32 or M3 screw
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
Junction-to-Case
j
––– 1.05
R
θCS
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
R
θJA
Junction-to-Ambient ––– 62
Max.
87
61
350
199
See Fig. 12a, 12b, 15, 16
-55 to + 175
300
10 lbf
y
in (1.1N
y
m)
143
0.95
± 20
368
V
(BR)DSS
40V
R
DS(on)
typ. 7.8
m
Ω
max 9.2
m
Ω
I
D
87A
AUIRF3504
2www.irf.com
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D
G
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Starting TJ = 25°C, L = 0.15mH
RG = 50Ω, IAS = 52A. (See Figure 12).
ISD ≤ 52A, di/dt ≤ 6750A/μs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
S
D
G
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population,
starting TJ = 25°C, L = 0.15mH, RG = 50Ω, IAS = 52A.
Rθ is measured at TJ of approximately 90°C.
J
= 25°C (unless otherwise specified)
Parameter
Min.
Typ.
Max.
Units
V
(BR)DSS
Drain-to-Source Breakdown Voltage
40
–––
–––
V
Δ
V
(BR)DSS
/
Δ
T
J
Breakdown Voltage Temp. Coefficient
–––
0.04
–––
V/°C
R
DS(on)
Static Drain-to-Source On-Resistance
–––
7.8
9.2
m
Ω
V
GS(th)
Gate Threshold Voltage
2.0
–––
4.0
V
gfs
Forward Transconductance
46
–––
–––
S
I
DSS
Drain-to-Source Leakage Current
–––
–––
20
μA
–––
–––
250
I
GSS
Gate-to-Source Forward Leakage
–––
–––
200
nA
Gate-to-Source Reverse Leakage
–––
–––
-200
Dynamic Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Min.
Typ.
Max.
Units
Q
g
Total Gate Charge
–––
36
54
Q
gs
Gate-to-Source Charge
–––
12
18
nC
Q
gd
Gate-to-Drain ("Miller") Charge
–––
13
20
t
d(on)
Turn-On Delay Time
–––
9.9
–––
t
r
Rise Time
–––
61
–––
t
d(off)
Turn-Off Delay Time
–––
24
–––
ns
t
f
Fall Time
–––
29
–––
L
D
Internal Drain Inductance
–––
4.5
–––
Between lead,
nH 6mm (0.25in.)
L
S
Internal Source Inductance
–––
7.5
–––
from package
and center of die contact
C
iss
Input Capacitance
–––
2150
–––
C
oss
Output Capacitance
–––
600
–––
pF
C
rss
Reverse Transfer Capacitance
–––
54
–––
C
oss
Output Capacitance
–––
2885
–––
C
oss
Output Capacitance
–––
526
–––
C
oss
eff.
Effective Output Capacitance
g
–––
147
–––
Diode Characteristics
Parameter
Min.
Typ.
Max.
Units
I
S
Continuous Source Current
–––
–––
87
(Body Diode) A
I
SM
Pulsed Source Current
–––
–––
350
(Body Diode)
c
V
SD
Diode Forward Voltage
–––
–––
1.3
V
t
rr
Reverse Recovery Time
–––
65
98
ns
Q
rr
Reverse Recovery Charge
–––
144
216
nC
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Conditions
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
DS
= 10V, I
D
= 52A
I
D
= 52A
V
DS
= 32V
V
GS
= 20V
V
GS
= -20V
V
GS
= 10V
f
MOSFET symbol
V
DD
= 20V
I
D
= 52A
R
G
= 2.7
Ω
Conditions
V
GS
= 10V
f
V
GS
= 0V
V
DS
= 25V
ƒ = 1.0MHz, See Fig. 5
V
GS
= 0V, V
DS
= 0V to 32V
V
GS
= 0V, V
DS
= 32V, ƒ = 1.0MHz
V
DS
= V
GS
, I
D
= 100μA
V
DS
= 40V, V
GS
= 0V
V
DS
= 40V, V
GS
= 0V, T
J
= 125°C
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 52A
f
T
J
= 25°C, I
F
= 52A
di/dt = 100A/μs
f
T
J
= 25°C, I
S
= 52A, V
GS
= 0V
f
showing the
integral reverse
p-n junction diode.
AUIRF3504
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Qualification standards can be found at International Rectifiers web site: http//www.irf.com/
Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.
Highest passing voltage.
Qualification Information
†
TO-220 N/A
RoHS Compliant Yes
ESD
Machine Model Class M4 (+/- 500V)
†††
AEC-Q101-002
Human Body Model Class H1C (+/- 1500V)
†††
AEC-Q101-001
Qualification Level
Automotive
(per AEC-Q101)
††
Comments: This part number(s) passed Automotive qualification.
IR’s Industrial and Consumer qualification level is granted by
extension of the higher Automotive level.
Charged Device
Model
Class C5 (+/- 2000V)
†††
AEC-Q101-005
Moisture Sensitivity Level
AUIRF3504
4www.irf.com
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance
vs. Drain Current
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
10V
7.0V
6.5V
6.0V
5.5V
5.0V
BOTTOM 4.5V
≤60μs PULSE WIDTH
Tj = 25°C
4.5V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
4.5V
≤60μs PULSE WIDTH
Tj = 175°C
VGS
TOP 15V
10V
7.0V
6.5V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0246810 12 14 16
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
VDS = 25V
≤60μs PULSE WIDTH
0 20 40 60 80 100 120
ID,Drain-to-Source Current (A)
-10
0
10
20
30
40
50
60
70
Gfs, Forward Transconductance (S)
TJ = 25°C
TJ = 175°C
VDS = 5.0V
380μs PULSE WIDTH
AUIRF3504
www.irf.com 5
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
100000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0 5 10 15 20 25 30 35 40 45
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VGS, Gate-to-Source Voltage (V)
VDS= 32V
VDS= 20V
VDS= 8.0V
ID= 52A
0.0 0.5 1.0 1.5 2.0 2.5
VSD, Source-to-Drain Voltage (V)
1.0
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
DC
AUIRF3504
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Normalized On-Resistance
vs. Temperature
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
20
40
60
80
100
ID, Drain Current (A)
-60 -40 -20 020 40 60 80 100120140160180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 87A
VGS = 10V
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
10
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
AUIRF3504
www.irf.com 7
QG
QGS QGD
VG
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3μF
50KΩ
.2μF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 14. Threshold Voltage vs. Temperature
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
200
400
600
800
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 11A
23A
BOTTOM 52A
-100 -50 050 100 150 200
TJ , Temperature ( °C )
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VGS(th), Gate threshold Voltage (V)
ID = 100μA
AUIRF3504
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Fig 15. Typical Avalanche Current vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
50
100
150
200
250
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 52A
AUIRF3504
www.irf.com 9
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* V
GS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
AUIRF3504
10 www.irf.com
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
YWWA
XX or XX
Part Number
IR Logo
Lot Code
AUIRF3504
Date Code
Y= Year
WW= Work Week
A= Automotive, Lead Free
AUIRF3504
www.irf.com 11
Ordering Information
Base part
number
Package Type Standard Pack Complete Part Number
Form
Quantity
AUIRF3504
TO-220
Tube
50
AUIRF3504
AUIRF3504
12 www.irf.com
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accordance with IRs standard warranty. Testing and other quality control techniques are used to the extent
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