LMV771, LMV772, LMV774
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SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
LMV771/LMV772/LMV772Q/LMV774 Single/Dual/Quad, Low Offset, Low Noise, RRO
Operational Amplifiers
Check for Samples: LMV771,LMV772,LMV774
1FEATURES • Temperature range −40°C to 125°C
• LMV772Q is AEC-Q100 Grade 1 qualified and
23• (Unless otherwise noted, typical values at VS=is manufactured on Automotive grade flow
2.7V)
• Guaranteed 2.7V and 5V specifications APPLICATIONS
• Maximum VOS (LMV771) 850μV (limit) • Transducer amplifier
• Voltage noise • Instrumentation amplifier
• f = 100 Hz 12.5nV/√Hz • Precision current sensing
• f = 10 kHz 7.5nV/√Hz • Data acquisition systems
• Rail-to-Rail output swing • Active filters and buffers
• RL= 600Ω100mV from rail • Sample and hold
• RL= 2kΩ50mV from rail • Portable/battery powered electronics
• Open loop gain with RL= 2kΩ100dB • Automotive
• VCM 0 to V+−0.9V
• Supply current (per amplifier) 550µA
• Gain bandwidth product 3.5MHz
DESCRIPTION
The LMV771/LMV772/LMV772Q/LMV774 are Single, Dual, and Quad low noise precision operational amplifiers
intended for use in a wide range of applications. Other important characteristics of the family include: an
extended operating temperature range of −40°C to 125°C, the tiny SC70-5 package for the LMV771, and low
input bias current.
The extended temperature range of −40°C to 125°C allows the LMV771/LMV772/LMV772Q/LMV774 to
accommodate a broad range of applications. The LMV771 expands National Semiconductor’s Silicon Dust™
amplifier portfolio offering enhancements in size, speed, and power savings. The
LMV771/LMV772/LMV772Q/LMV774 are guaranteed to operate over the voltage range of 2.7V to 5.0V and all
have rail-to-rail output.
The LMV771/LMV772/LMV772Q/LMV774 family is designed for precision, low noise, low voltage, and miniature
systems. These amplifiers provide rail-to-rail output swing into heavy loads. The maximum input offset voltage for
the LMV771 is 850 μV at room temperature and the input common mode voltage range includes ground.
The LMV771 is offered in the tiny SC70-5 package, LMV772/LMV772Q in the space saving MSOP-8 and SOIC-
8, and the LMV774 in TSSOP-14.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Silicon Dust is a trademark of Texas Instruments.
3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2004–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
VO = -K (2a + 1) (V1 - V2)
+
-
+
-
-
+
R2KR2
R1
R1
R2KR2
VOUT
V1
V2
V01
V02
R1
a
R11 =
V+
VOUT
+IN
GND
-IN
5
4
1
2
3
+
-
LMV771, LMV772, LMV774
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
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Connection Diagram
Figure 1. SC70-5 (Top View)
Instrumentation Amplifier
(1)
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings (1)
ESD Tolerance (2)
Machine Model 200V
Human Body Model 2000V
Differential Input Voltage ± Supply Voltage
Voltage at Input Pins (V+) + 0.3V, (V–) – 0.3V
Current at Input Pins ±10 mA
Supply Voltage (V+–V −) 5.75V
Output Short Circuit to V+ (3)
Output Short Circuit to V−(4)
Mounting Temperture
Infrared or Convection (20 sec) 235°C
Wave Soldering Lead Temp (10 sec) 260°C
Storage Temperature Range −65°C to 150°C
Junction Temperature (5) 150°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics.
(2) Human Body Model is 1.5 kΩin series with 100 pF. Machine Model is 0Ωin series with 20 pF.
(3) Shorting output to V+will adversely affect reliability.
(4) Shorting output to V−will adversely affect reliability.
(5) The maximum power dissipation is a function of TJ(MAX) ,θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD= (TJ(MAX)–T A)/θJA. All numbers apply for packages soldered directly into a PC board.
Operating Ratings (1)
Supply Voltage 2.7V to 5.5V
Temperature Range −40°C to 125°C
Thermal Resistance (θJA)
SC70-5 Package 440 °C/W
8-Pin MSOP 235°C/W
8-Pin SOIC 190°C/W
14-Pin TSSOP 155°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics.
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2.7V DC Electrical Characteristics (1)
Unless otherwise specified, all limits are guaranteed for TA= 25°C. V+= 2.7V, V −= 0V, VCM = V+/2, VO= V+/2 and RL> 1MΩ.
Boldface limits apply at the temperature extremes. Min Typ Max
Symbol Parameter Condition Units
(2) (3) (2)
0.3 0.85
LMV771 1.0
VOS Input Offset Voltage mV
0.3 1.0
LMV772/LMV772Q/LMV774 1.2
TCVOS Input Offset Voltage Average Drift −0.45 µV/°C
−0.1 100
IBInput Bias Current (4) VCM = 1V pA
250
IOS Input Offset Current (4) 0.004 100 pA
550 900
ISSupply Current (Per Amplifier) µA
910
74 80
CMRR Common Mode Rejection Ratio 0.5 ≤VCM ≤1.2V dB
72
82 90 dB
PSSR Power Supply Rejection Ratio 2.7V ≤V+≤5V 76
VCM Input Common-Mode Voltage Range For CMRR ≥50dB 0 1.8 V
RL= 600Ωto 1.35V, 92 100
VO= 0.2V to 2.5V, (6) 80
Large Signal Voltage Gain
AVdB
(5) RL= 2kΩto 1.35V, 98 100
VO= 0.2V to 2.5V, (7) 86
RL= 600Ωto 1.35V 0.11 0.084 to 2.59
VIN = ± 100mV, (6) 0.14 2.62 2.56
VOOutput Swing V
RL= 2kΩto 1.35V 0.05 0.026 to 2.65
VIN = ± 100mV, (7) 0.06 2.68 2.64
Sourcing, VO= 0V 18 24
VIN = 100mV 11
IOOutput Short Circuit Current mA
Sinking, VO= 2.7V 18 22
VIN =−100mV 11
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm.
(4) Limits guaranteed by design.
(5) RLis connected to mid-supply. The output voltage is set at 200mV from the rails. VO= GND + 0.2V and VO= V+−0.2V
(6) For LMV772/LMV772Q/LMV774, temperature limits apply to −40°C to 85°C.
(7) For LMV772/LMV772Q/LMV774, temperature limits apply to −40°C to 85°C. If RLis relaxed to 10 kΩ, then for
LMV772/LMV772Q/LMV774 temperature limits apply to −40°C to 125°C.
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2.7V AC Electrical Characteristics (1)
Unless otherwise specified, all limits are guaranteed for TA= 25°C. V+= 5.0V, V −= 0V, VCM = V+/2, VO= V+/2 and RL> 1MΩ.
Boldface limits apply at the temperature extremes. Min Typ Max
Symbol Parameter Conditions Units
(2) (3) (2)
SR Slew Rate (4) AV= +1, RL= 10 kΩ1.4 V/µs
GBW Gain-Bandwidth Product 3.5 MHz
ΦmPhase Margin 79 Deg
GmGain Margin −15 dB
Input-Referred Voltage Noise
enf = 10kHz 7.5 nV/√Hz
(Flatband)
enInput-Referred Voltage Noise (l/f) f = 100Hz 12.5 nV/√Hz
inInput-Referred Current Noise f = 1kHz 0.001 pA/√Hz
f = 1kHz, AV= +1
THD Total Harmonic Distortion 0.007 %
RL= 600Ω, VIN = 1 VPP
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm.
(4) The number specified is the slower of positive and negative slew rates.
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5.0V DC Electrical Characteristics (1)
Unless otherwise specified, all limits are guaranteed for TA= 25°C. V+= 5.0V, V −= 0V, VCM = V+/2, VO= V+/2 and RL> 1MΩ.
Boldface limits apply at the temperature extremes. Min Typ Max
Symbol Parameter Condition Units
(2) (3) (2)
0.25 0.85
LMV771 1.0
VOS Input Offset Voltage mV
0.25 1.0
LMV772/LMV772Q/LMV774 1.2
TCVOS Input Offset Voltage Average Drift −0.35 µV/°C
−0.23 100
IBInput Bias Current (4) VCM = 1V pA
250
IOS Input Offset Current (4) 0.017 100 pA
600 950
ISSupply Current (Per Amplifier) µA
960
80 90
CMRR Common Mode Rejection Ratio 0.5 ≤VCM ≤3.5V dB
79
82 90 dB
PSRR Power Supply Rejection Ratio 2.7V ≤V+≤5V 76
VCM Input Common-Mode Voltage Range For CMRR ≥50dB 0 4.1 V
RL= 600Ωto 2.5V, 92 100
VO= 0.2V to 4.8V, (6) 89
Large Signal Voltage Gain
AVdB
(5) RL= 2kΩto 2.5V, 98 100
VO= 0.2V to 4.8V, (7) 95
RL= 600Ωto 2.5V 0.15 0.112 to 4.85
VIN = ± 100mV, (6) 0.23 4.9 4.77
VOOutput Swing V
RL= 2kΩto 2.5V 0.06 0.035 to 4.94
VIN = ± 100mV, (7) 0.07 4.97 4.93
Sourcing, VO= 0V 35 75
VIN = 100mV 35
IOOutput Short Circuit Current (4) (8) mA
Sinking, VO= 2.7V 35 66
VIN =−100mV 35
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm.
(4) Limits guaranteed by design.
(5) RLis connected to mid-supply. The output voltage is set at 200mV from the rails. VO= GND + 0.2V and VO= V+−0.2V
(6) For LMV772/LMV772Q/LMV774, temperature limits apply to −40°C to 85°C.
(7) For LMV772/LMV772Q/LMV774, temperature limits apply to −40°C to 85°C. If RLis relaxed to 10 kΩ, then for
LMV772/LMV772Q/LMV774 temperature limits apply to −40°C to 125°C.
(8) Continuous operation of the device with an output short circuit current larger than 35mA may cause permanent damage to the device.
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V+
VOUT
+IN
GND
-IN
5
4
1
2
3
+
-
LMV771, LMV772, LMV774
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SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
5.0V AC Electrical Characteristics (1)
Unless otherwise specified, all limits are guaranteed for TA= 25°C. V+= 5.0V, V −= 0V, VCM = V+/2, VO= V+/2 and RL> 1MΩ.
Boldface limits apply at the temperature extremes. Min Typ Max
Symbol Parameter Conditions Units
(2) (3) (2)
SR Slew Rate (4) AV= +1, RL= 10 kΩ1.4 V/µs
GBW Gain-Bandwidth Product 3.5 MHz
ΦmPhase Margin 79 Deg
GmGain Margin −15 dB
Input-Referred Voltage Noise
enf = 10kHz 6.5 nV/√Hz
(Flatband)
enInput-Referred Voltage Noise (l/f) f = 100Hz 12 nV/√Hz
inInput-Referred Current Noise f = 1kHz 0.001 pA/√Hz
f = 1kHz, AV= +1
THD Total Harmonic Distortion 0.007 %
RL= 600Ω, VIN = 1 VPP
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ= TA.
(2) All limits are guaranteed by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm.
(4) The number specified is the slower of positive and negative slew rates.
Connection Diagrams
Figure 2. SC70-5 Figure 3. 8-Pin MSOP/SOIC Figure 4. 14-Pin TSSOP
(Top View) (Top View) (Top View)
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2.5 3 3.5 4 4.5 5 5.5
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
VOUT FROM V- (mV)
VS (V)
RL = 100k:
TA = 25°C
NEGATIVE SWING
POSITIVE SWING
2.5 3 3.5 44.5 5 5.5
SUPPLY VOLTAGE (V)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
SUPPLY CURRENT (mA)
125°C
85°C
25°C
-40°C
2.5 3 3.5 44.5 5 5.5
VS (V)
40
50
60
70
80
90
100
110
120
VOUT FROM VSUPPLY (mV)
RL = 600:
TA = 25°C
NEGATIVE SWING
POSITIVE SWING
2.5 33.5 4 4.5 5 5.5
VS (V)
20
25
30
35
40
VOUT FROM VSUPPLY (mV)
RL = 2k:
TA = 25°C
NEGATIVE SWING
POSITIVE SWING
-0.5 0 0.5 11.5 2 2.5
VCM (V)
-1
-0.5
0
0.5
1
1.5
2
2.5
VOS (mV)
VS = 2.7V -40°C
25°C
85°C
125°C
3
-0.5 0.5 1 2.5 3 5
-1
-0.5
0.5
1
1.5
2
2.5
3
3.5
4
VOS (mV)
VCM (V)
0
0 1.5 2 3.5 4 4.5
-40°C
85°C
25°C
125°C
VS = 5V
LMV771, LMV772, LMV774
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
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Typical Performance Characteristics
VOS VOS
vs. vs.
VCM Over Temperature VCM Over Temperature
Output Swing Output Swing
vs. vs.
VSVS
Output Swing IS
vs. vs.
VSVSOver Temperature
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00.5 1 1.5 2 2.5 3
VOUT REFERENCED TO V+ (V)
0
10
20
30
40
ISINK (mA)
25°C
-40°C
VS = 2.7V
125°C
85°C
0 0.5 11.5 2 2.5 3
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
ISOURCE (mA)
VOUT FROM V- (V)
VS = 2.7V
125°C
85°C
-40°C
25°C
-3 -2 -1 0 1 2 3
-500
-400
-300
-200
-100
0
100
200
300
400
500
INPUT VOLTAGE (PV)
OUTPUT VOLTAGE (V)
VS = ±2.5V
TA = 25°C
RL = 2k:
RL = 600:
-1.5 -1 0.5 0 0.5 1 1.5
-500
-400
-300
-200
-100
0
100
200
300
400
500
INPUT VOLTAGE (PV)
OUTPUT VOLTAGE (V)
VS = ±1.35V
TA = 25°C
RL = 2k:
RL = 600:
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Typical Performance Characteristics (continued)
VIN VIN
vs. vs.
VOUT VOUT
Sourcing Current Sourcing Current
vs. vs.
VOUT(1) VOUT(1)
Sinking Current Sinking Current
vs. vs.
VOUT(2) VOUT(2)
(1) Continuous operation of the device with an output short circuit current larger than 35mA may cause permanent damage to the device.
(2) Continuous operation of the device with an output short circuit current larger than 35mA may cause permanent damage to the device.
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0.1 1 10
VOUT (VPP)
0.001
0.01
0.1
1
THD+N (%)
VS = 2.7V
VS = 5V
AV = +10
AV = +1
10 100 1k 10k 100k
FREQUENCY (Hz)
0.001
0.01
0.1
1
10
THD+N (%)
AV = +1
RL = 600:
AV = +10
VS = 5V, VO = 1VPP
VS = 2.7V, VO = 1VPP
VS = 5V, VO = 2.5VPP
VS = 2.7V, VO = 1VPP
-0.5 0.5 22.5 3.5 4 5.5
-500
-400
-200
-100
0
100
200
300
400
500
INPUT BIAS CURRENT (fA)
VCM (V)
-300
011.5 3 4.5 5
T = 25°C
VS = 2.7V
VS = 5V
-0.5 0.5 22.5 3.5 4 5.5
-50
-40
-20
-10
0
10
20
30
40
50
INPUT BIAS CURRENT (fA)
VCM (V)
-30
011.5 3 4.5 5
T = -40°C
VS = 2.7V
VS = 5V
10 100 1k 10k
FREQUENCY (Hz)
0
5
10
15
20
25
30
35
INPUT VOLTAGE NOISE (nV/ Hz)
VS = 5V
VS = 2.7V
LMV771, LMV772, LMV774
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
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Typical Performance Characteristics (continued)
Input Voltage Noise
vs.
Frequency Input Bias Current Over Temperature
Input Bias Current Over Temperature Input Bias Current Over Temperature
THD+N THD+N
vs. vs.
Frequency VOUT
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OUTPUT SIGNAL
TIME (10 Ps/div)
INPUT SIGNAL
(50 mV/div)
VS = ±2.5V
TA = -40°C
RL = 2k:
OUTPUT SIGNAL
TIME (10 Ps/div)
INPUT SIGNAL
(1 V/div)
VS = ±2.5V
TA = -40°C
RL = 2k:
1k 10k 100k 1M 10M
FREQUENCY (Hz)
-20
-10
0
10
20
30
40
50
60
70
80
GAIN (dB)
0
10
20
30
40
50
60
70
80
90
100
PHASE (°)
GAIN
PHASE CL = 0pF
VS = 5V
RL = 600:
CL = 100pF
CL = 100pF
CL = 0pF
CL = 1000pF
CL = 500pF
1k 10k 100k 1M 10M
FREQUENCY (Hz)
-20
-10
0
10
20
30
40
50
60
70
80
GAIN (dB)
0
10
20
30
40
50
60
70
80
90
100
PHASE (°)
GAIN
PHASE CL = 0pF
VS = 5V
RL = 100k:
CL = 100pF
CL = 100pF
CL = 0pF
CL = 1000pF
CL = 500pF
1k 10k 100k 1M 10M
FREQUENCY (Hz)
-20
-10
0
10
20
30
40
50
60
70
80
GAIN (dB)
0
10
20
30
40
50
60
70
80
90
100
PHASE (°)
GAIN
PHASE RL = 600:
RL = 100k:
RL = 2k:
RL = 100k:
RL = 600:
RL = 2k:
VS = 2.7V
1k 10k 100k 1M 10M
FREQUENCY (Hz)
-20
-10
0
10
20
30
40
50
60
70
80
GAIN (dB)
0
10
20
30
40
50
60
70
80
90
100
PHASE (°)
GAIN
PHASE RL = 100k:
RL = 2k:
RL = 600:
RL = 100k:
RL = 600:
RL = 2k:
VS = 5V
1k 10k 100k 1M 10M
FREQUENCY (Hz)
-20
-10
0
10
20
30
40
50
60
70
80
GAIN (dB)
0
10
20
30
40
50
60
70
80
90
100
PHASE (°)
GAIN
PHASE
125°C
-40°C
25°C
-40°C
25°C
125°C
VS = 5V
RL = 2k:
2.5 3 3.5 4 4.5 5
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2
SLEW RATE (V/Ps)
SUPPLY VOLTAGE (V)
AV = +1
RL = 10k:
VIN = 2VPP
FALLING EDGE
RISING EDGE
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Typical Performance Characteristics (continued)
Slew Rate
vs.
Supply Voltage Open Loop Frequency Response Over Temperature
Open Loop Frequency Response Open Loop Frequency Response
Open Loop Gain & Phase with Cap. Loading Open Loop Gain & Phase with Cap. Loading
Non-Inverting Small Signal Pulse Response Non-Inverting Large Signal Pulse Response
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OUTPUT SIGNAL
TIME (10 Ps/div)
INPUT SIGNAL
(50 mV/div)
VS = ±2.5V
TA = 25°C
RL = 2k:
OUTPUT SIGNAL
TIME (10 Ps/div)
INPUT SIGNAL
(1 V/div)
VS = ±2.5V
TA = 25°C
RL = 2k:
OUTPUT SIGNAL
TIME (10 Ps/div)
INPUT SIGNAL
(50 mV/div)
VS = ±2.5V
TA = -40°C
RL = 2k:
OUTPUT SIGNAL
TIME (10 Ps/div)
INPUT SIGNAL
(1 V/div)
VS = ±2.5V
TA = -40°C
RL = 2k:
OUTPUT SIGNAL
TIME (10 Ps/div)
INPUT SIGNAL
(50 mV/div)
VS = ±2.5V
TA = 125°C
RL = 2k:
OUTPUT SIGNAL
TIME (10 Ps/div)
(1 V/div) INPUT SIGNAL
VS = ±2.5V
TA = 125°C
RL = 2k:
OUTPUT SIGNAL
TIME (10 Ps/div)
INPUT SIGNAL
(50 mV/div)
VS = ±2.5V
TA = 25°C
RL = 2k:
OUTPUT SIGNAL
TIME (10 Ps/div)
INPUT SIGNAL
(1 V/div)
VS = ±2.5V
TA = 25°C
RL = 2k:
LMV771, LMV772, LMV774
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
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Typical Performance Characteristics (continued)
Non-Inverting Small Signal Pulse Response Non-Inverting Large Signal Pulse Response
Non-Inverting Small Signal Pulse Response Non-Inverting Large Signal Pulse Response
Inverting Small Signal Pulse Response Inverting Large Signal Pulse Response
Inverting Small Signal Pulse Response Inverting Large Signal Pulse Response
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100 1k 10k 100k 1M
FREQUENCY (Hz)
0
20
40
60
80
100
120
140
PSRR (dB)
RL = 100k:
VS = 2.7V, -PSRR
VS = 2.7V, +PSRR
VS = 5V, -PSRR
VS = 5V, +PSRR
100 1k 10k 100k 1M
FREQUENCY (Hz)
0
10
20
30
40
50
60
70
80
90
100
CMRR (dB)
RL = 5 k:
VS = 5V
VS = 2.7V
-2 -1.5 -1 -0.5 0 0.5 1 1.5
0
50
100
150
200
250
300
350
400
450
500
CAPACITIVE LOAD (pF)
VCM (V)
25% OVERSHOOT
VS = ±2.5V
AV = +1
RL = 2k:
VO = 100mV
-2 -1.5 -1 -0.5 0 0.5 1
VCM (V)
0
50
100
150
200
250
CAPACITIVE LOAD (pF)
1.5
25% OVERSHOOT
VS = ±2.5V
AV = +1
RL = 1M:
VO = 100mV
OUTPUT SIGNAL
TIME (10 Ps/div)
INPUT SIGNAL
(50 mV/div)
VS = ±2.5V
TA = 125°C
RL = 2k:
OUTPUT SIGNAL
TIME (10 Ps/div)
INPUT SIGNAL
(1 V/div)
VS = ±2.5V
TA = 125°C
RL = 2k:
LMV771, LMV772, LMV774
www.ti.com
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
Typical Performance Characteristics (continued)
Inverting Small Signal Pulse Response Inverting Large Signal Pulse Response
Stability Stability
vs. vs.
VCM VCM
PSRR CMRR
vs. vs.
Frequency Frequency
Copyright © 2004–2010, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LMV771 LMV772 LMV774
+
-
+
-
-
+
R2KR2
R1
R1
R2KR2
VOUT
V1
V2
V01
V02
R1
a
R11 =
100 1k 10k 100k 600k
FREQUENCY (Hz)
0
20
40
60
80
100
120
140
CROSSTALK REJECTION (dB)
VS = 5V
VS = 2.7V
LMV771, LMV772, LMV774
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
www.ti.com
Typical Performance Characteristics (continued)
Crosstalk Rejection
vs.
Frequency (LMV772/LMV772Q/LMV774)
Application Note
LMV771/LMV772/LMV772Q/LMV774
The LMV771/LMV772LMV772Q/LMV774 are a family of precision amplifiers with very low noise and ultra low
offset voltage. LMV771/LMV772/LMV772Q/LMV774's extended temperature range of −40°C to 125°C enables
the user to design this family of products into a variety of applications including automotive.
The LMV771 has a maximum offset voltage of 1mV over the extended temperature range. This makes the
LMV771 ideal for applications where precision is important.
The LMV772/LMV772Q/LMV774 have a maximum offset voltage of 1mV at room temperature and 1.2mV over
the extended temperature range of −40°C to 125°C. Care must be taken when the LMV772/LMV772Q/LMV774
are designed into applications with heavy loads under extreme temperature conditions. As indicated in the DC
tables, the LMV772/LMV772Q/LMV774's gain and output swing may be reduced at temperatures between 85°C
and 125°C with loads heavier than 2kΩ.
INSTRUMENTATION AMPLIFIER
Measurement of very small signals with an amplifier requires close attention to the input impedance of the
amplifier, gain of the overall signal on the inputs, and the gain on each input since we are only interested in the
difference of the two inputs and the common signal is considered noise. A classic solution is an instrumentation
amplifier. Instrumentation amplifiers have a finite, accurate, and stable gain. Also they have extremely high input
impedances and very low output impedances. Finally they have an extremely high CMRR so that the amplifier
can only respond to the differential signal. A typical instrumentation amplifier is shown in Figure 5.
Figure 5. Instrumentation Amplifier
14 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Links: LMV771 LMV772 LMV774
10 100 1k 10k
FREQUENCY (Hz)
-140
-120
-100
-80
-60
-40
-20
0
CMRR (dB)
VS = ±2.5V
VCM = 0V
VIN = 3VPP
VO = -K (2a + 1) (V1 - V2)
VO = KR2
R2(VO2 - VO1)
= -K (VO1 - VO2)
R11 = V1 - V2
V
VO1 - VO2 = (2R1 + ) I
R11 R11
= (2a + 1) V R11
= (2a + 1) R11 xIR11
GIVEN: I R1= IR11
LMV771, LMV772, LMV774
www.ti.com
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
There are two stages in this amplifier. The last stage, output stage, is a differential amplifier. In an ideal case the
two amplifiers of the first stage, input stage, would be set up as buffers to isolate the inputs. However they
cannot be connected as followers because of real amplifier's mismatch. That is why there is a balancing resistor
between the two. The product of the two stages of gain will give the gain of the instrumentation amplifier. Ideally,
the CMRR should be infinite. However the output stage has a small non-zero common mode gain which results
from resistor mismatch.
In the input stage of the circuit, current is the same across all resistors. This is due to the high input impedance
and low input bias current of the LMV771. With the node equations we have:
(2)
By Ohm’s Law:
(3)
However:
(4)
So we have: (5)
Now looking at the output of the instrumentation amplifier:
(6)
Substituting from Equation 5:
(7)
This shows the gain of the instrumentation amplifier to be:
−K(2a+1) (8)
Typical values for this circuit can be obtained by setting: a = 12 and K= 4. This results in an overall gain of −100.
Figure 6 shows typical CMRR characteristics of this Instrumentation amplifier over frequency. Three LMV771
amplifiers are used along with 1% resistors to minimize resistor mismatch. Resistors used to build the circuit are:
R1= 21.6kΩ, R11 = 1.8kΩ, R2= 2.5kΩwith K = 40 and a = 12. This results in an overall gain of −1000, −K(2a+1)
=−1000.
Figure 6. CMRR vs. Frequency
Copyright © 2004–2010, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LMV771 LMV772 LMV774
1
1 + j (f/fo)
H = HO
H = HO1
j2SfcR2 +1
R1
1
jwcR2 +1
-R2
Vi
VO=
VO =Vi
R1
1
jwcR2 +1
-R2
- -
-Vi
R1
VO
R2= O
VO
1
jwc
Vi
R1R2
+
-VOUT
C
LMV771, LMV772, LMV774
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
www.ti.com
ACTIVE FILTER
Active filters are circuits with amplifiers, resistors, and capacitors. The use of amplifiers instead of inductors,
which are used in passive filters, enhances the circuit performance while reducing the size and complexity of the
filter.
The simplest active filters are designed using an inverting op amp configuration where at least one reactive
element has been added to the configuration. This means that the op amp will provide "frequency-dependent"
amplification, since reactive elements are frequency dependent devices.
LOW PASS FILTER
The following shows a very simple low pass filter.
Figure 7. Lowpass Filter
The transfer function can be expressed as follows:
By KCL:
(9)
Simplifying this further results in:
(10)
or
(11)
Now, substituting ω=2πf, so that the calculations are in f(Hz) and not ω(rad/s), and setting the DC gain HO=
−R2/R1and H = VO/Vi
(12)
Set: fo= 1/(2πR1C)
(13)
Low pass filters are known as lossy integrators because they only behave as an integrator at higher frequencies.
Just by looking at the transfer function one can predict the general form of the bode plot. When the f/fOratio is
small, the capacitor is in effect an open circuit and the amplifier behaves at a set DC gain. Starting at fO,−3dB
corner, the capacitor will have the dominant impedance and hence the circuit will behave as an integrator and
the signal will be attenuated and eventually cut. The bode plot for this filter is shown in the following picture:
16 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Links: LMV771 LMV772 LMV774
j (f/fo)
1 + j (f/fo)
H = HO
HO = -R2
R1
H = VO
Vi
fO = 1
2SR1C
=
V- + VO
R2
V- + V1
R1
=
V1 - V-
R1
V1 - Vi
1
jwC
Vi
R1R2
+
-VOUT
C
dB
0f = fo
-20dB/dec
f (Hz)
|H|
|HO|
LMV771, LMV772, LMV774
www.ti.com
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
Figure 8. Lowpass Filter Transfer Function
HIGH PASS FILTER
In a similar approach, one can derive the transfer function of a high pass filter. A typical first order high pass filter
is shown below:
Figure 9. Highpass FIlter
Writing the KCL for this circuit :
(V1denotes the voltage between C and R1)
(14)
(15)
Solving these two equations to find the transfer function and using:
(16)
(high frequency gain) and
Which results:
(17)
Looking at the transfer function, it is clear that when f/fOis small, the capacitor is open and hence no signal is
getting in to the amplifier. As the frequency increases the amplifier starts operating. At f = fOthe capacitor
behaves like a short circuit and the amplifier will have a constant, high frequency, gain of HO.Figure 10 shows
the transfer function of this high pass filter:
Copyright © 2004–2010, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LMV771 LMV772 LMV774
f1 = 1
2SR1C1
f2 = 1
2SR2C2
HO = -R2
R1
j (f/f1)
[1 + j (f/f1)]
H = HO[1 + j (f/f2)]
Vi
R1R2
+
-VOUT
C2
C1
dB
0f = fo
-20dB/dec
f (Hz)
|H|
|HO|
LMV771, LMV772, LMV774
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
www.ti.com
Figure 10. Highpass Filter Transfer Function
BAND PASS FILTER
Figure 11. Bandpass Filter
Combining a low pass filter and a high pass filter will generate a band pass filter. In this network the input
impedance forms the high pass filter while the feedback impedance forms the low pass filter. Choosing the
corner frequencies so that f1< f2, then all the frequencies in between, f1≤f≤f2, will pass through the filter while
frequencies below f1and above f2will be cut off.
The transfer function can be easily calculated using the same methodology as before.
(18)
Where
(19)
The transfer function is presented in the following figure.
18 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Links: LMV771 LMV772 LMV774
VO1
R1
R5
R6
VO
VIN
VO2
R4
A1
-
+
VLP
VBP
VHP
VIN
R4
R1
+
-
R2
C2
A2
+
-
R3
C3
A3
+
-
A1
R6
R5
dB
0f1
-20dB/dec
f (Hz)
|H
|
|HO|
f2
20dB/dec
LMV771, LMV772, LMV774
www.ti.com
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
Figure 12. Bandpass filter Transfer Function
STATE VARIABLE ACTIVE FILTER
State variable active filters are circuits that can simultaneously represent high pass, band pass, and low pass
filters. The state variable active filter uses three separate amplifiers to achieve this task. A typical state variable
active filter is shown in Figure 13. The first amplifier in the circuit is connected as a gain stage. The second and
third amplifiers are connected as integrators, which means they behave as low pass filters. The feedback path
from the output of the third amplifier to the first amplifier enables this low frequency signal to be fed back with a
finite and fairly low closed loop gain. This is while the high frequency signal on the input is still gained up by the
open loop gain of the 1st amplifier. This makes the first amplifier a high pass filter. The high pass signal is then
fed into a low pass filter. The outcome is a band pass signal, meaning the second amplifier is a band pass filter.
This signal is then fed into the third amplifiers input and so, the third amplifier behaves as a simple low pass
filter.
Figure 13. State Variable Active Filter
The transfer function of each filter needs to be calculated. The derivations will be more trivial if each stage of the
filter is shown on its own.
The three components are:
Copyright © 2004–2010, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LMV771 LMV772 LMV774
C2R2
1R1 + R4
R1
VO2
VIN s2 + s 1
C2R2R5 + R6
R5
R1
R1 + R4
C2C3R2R3
1
+
=
sR6
R5 + R6
R1 + R4
R1R5 + R6
R6
VO1
VIN s2 + s 1
C2R2R5 + R6
R5
R1
R1 + R4
C2C3R2R3
1
+
=
s2
R1 + R4
R1R5 + R6
R6
C2C3R2R3
1
VO
VIN s2 + s 1
C2R2R5 + R6
R5
R1
R1 + R4
C2C3R2R3
1
+
=
VO = VO2
-1
s C3R3
VO2 = VO1
-1
s C2R2
VO1 = -R4
R1V0+R5 + R6
R6R1 + R4
R1VO2
R5 + R6
R5R1 + R4
R1
VIN +
VO1
VO2
+
-
R2
A2
VO
+
-
C3
A3
VO2
C2
R3
LMV771, LMV772, LMV774
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
www.ti.com
For A1the relationship between input and output is:
(20)
This relationship depends on the output of all the filters. The input-output relationship for A2can be expressed
as:
(21)
And finally this relationship for A3is as follows:
(22)
Re-arranging these equations, one can find the relationship between VOand VIN (transfer function of the lowpass
filter), VO1 and VIN (transfer function of the highpass filter), and VO2 and VIN (transfer function of the bandpass
filter) These relationships are as follows:
Lowpass Filter
(23)
Highpass Filter
(24)
Bandpass Filter
(25)
The center frequency and Quality Factor for all of these filters is the same. The values can be calculated in the
following manner:
20 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Links: LMV771 LMV772 LMV774
100 1k 10k 100k 400k
FREQUENCY (Hz)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
GAIN (dB)
DC GAIN = R5 + R6
R6
R1 + R4
R1= -14.8 dB
Q = 11
2=1
2
R5 + R6
R6
Zc=
C2R2
1
C2C3R2R3
C3R3
R5 + R6
R6
R1
R1 + R4
and
Q =
LMV771, LMV772, LMV774
www.ti.com
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
(26)
A design example is shown here:
Designing a bandpass filter with center frequency of 10kHz and Quality Factor of 5.5
To do this, first consider the Quality Factor. It is best to pick convenient values for the capacitors. C2= C3=
1000pF. Also, choose R1= R4= 30kΩ. Now values of R5and R6need to be calculated. With the chosen values
for the capacitors and resistors, Q reduces to:
(27)
or R5= 10R6R6= 1.5kΩR5= 15kΩ(28)
Also, for f = 10kHz, the center frequency is ωc= 2πf = 62.8kHz.
Using the expressions above, the appropriate resistor values will be R2= R3= 16kΩ.
The following graphs show the transfer function of each of the filters. The DC gain of this circuit is:
The frequency responses of each stage of the state variable active filter when implemented with the LMV774 are
shown in the following figures:
Figure 14. Lowpass Filter Frequency Response
Copyright © 2004–2010, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Links: LMV771 LMV772 LMV774
100 1k 10k 100k 400k
FREQUENCY (Hz)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
GAIN (dB)
100 1k 10k 100k 400k
FREQUENCY (Hz)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
GAIN (dB)
LMV771, LMV772, LMV774
SNOSA04F –MAY 2004–REVISED SEPTEMBER 2010
www.ti.com
Figure 15. Bandpass Filter Frequency Response
Figure 16. Highpass Filter Frequency Response
22 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Links: LMV771 LMV772 LMV774
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LMV771MG/NOPB ACTIVE SC70 DCK 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 A75
LMV771MGX/NOPB ACTIVE SC70 DCK 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 A75
LMV772MA/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LMV7
72MA
LMV772MAX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LMV7
72MA
LMV772MM/NOPB ACTIVE VSSOP DGK 8 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 A91A
LMV772MMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 A91A
LMV772QMM/NOPB ACTIVE VSSOP DGK 8 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 AJ7A
LMV772QMMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 AJ7A
LMV774MT/NOPB ACTIVE TSSOP PW 14 94 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LMV77
4MT
LMV774MTX/NOPB ACTIVE TSSOP PW 14 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LMV77
4MT
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMV772, LMV772-Q1 :
•Catalog: LMV772
•Automotive: LMV772-Q1
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LMV771MG/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV771MGX/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV772MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LMV772MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV772MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV772QMM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV772QMMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV774MTX/NOPB TSSOP PW 14 2500 330.0 12.4 6.95 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 15-Feb-2020
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LMV771MG/NOPB SC70 DCK 5 1000 210.0 185.0 35.0
LMV771MGX/NOPB SC70 DCK 5 3000 210.0 185.0 35.0
LMV772MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LMV772MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LMV772MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
LMV772QMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LMV772QMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
LMV774MTX/NOPB TSSOP PW 14 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 15-Feb-2020
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
.228-.244 TYP
[5.80-6.19]
.069 MAX
[1.75]
6X .050
[1.27]
8X .012-.020
[0.31-0.51]
2X
.150
[3.81]
.005-.010 TYP
[0.13-0.25]
0 - 8 .004-.010
[0.11-0.25]
.010
[0.25]
.016-.050
[0.41-1.27]
4X (0 -15 )
A
.189-.197
[4.81-5.00]
NOTE 3
B .150-.157
[3.81-3.98]
NOTE 4
4X (0 -15 )
(.041)
[1.04]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
18
.010 [0.25] C A B
5
4
PIN 1 ID AREA
SEATING PLANE
.004 [0.1] C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.800
www.ti.com
EXAMPLE BOARD LAYOUT
.0028 MAX
[0.07]
ALL AROUND
.0028 MIN
[0.07]
ALL AROUND
(.213)
[5.4]
6X (.050 )
[1.27]
8X (.061 )
[1.55]
8X (.024)
[0.6]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
EXPOSED
METAL
OPENING
SOLDER MASK METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED
METAL
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SYMM
1
45
8
SEE
DETAILS
SYMM
www.ti.com
EXAMPLE STENCIL DESIGN
8X (.061 )
[1.55]
8X (.024)
[0.6]
6X (.050 )
[1.27] (.213)
[5.4]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
SYMM
SYMM
1
45
8
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