IRF350 - Intersil Corporation

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

IRF350

15A, 400V, 0.300 Ohm, N-Channel Power

MOSFET

This is an N-Channel enhancement mode silicon gate power

ﬁeld effect transistor designed for applications such as

switching regulators, switching converters, motor drivers,

relay drivers, and drivers for high power bipolar switching

transistors requiring high speed and low gate drive power.

They can be operated directly from integrated circuits.

Formerly developmental type TA9399.

Features

• 15A, 400V

•r

DS(ON) = 0.300Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

JEDEC TO-204AA

TOP VIEW

Ordering Information

PART NUMBER PACKAGE BRAND

IRF350 TO-204AA IRF350

NOTE: When ordering, include the entire part number.

DRAIN

(FLANGE)

SOURCE (PIN 2)

GATE (PIN 1)

March 1999 File Number 1826.3Data Sheet

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Speciﬁed IRF350 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS 400 V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 400 V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID

TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID15

9.0 A

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 60 A

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD150 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS 700 mJ

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL

Paackage Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300

260

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. TJ = 25oC to 125oC.

Electrical Speciﬁcations TC = 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA, (Figure 10) 400 - - V

Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2.0 - 4.0 V

Zero-Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA

On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V 15 - - A

Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA

Drain to Source On Resistance (Note 2) rDS(ON) VGS = 10V, ID = 8.0A, (Figures 8, 9) - 0.25 0.300 Ω

Forward Transconductance (Note 2) gfs VDS > ID(ON) x rDS(ON)MAX, ID = 8A, (Figure 12) 8 10 - S

Turn-On Delay Time tD(ON) VDD = 180V, ID≈ 8.0A, RG = 4.7Ω, RL= 22.5Ω,

VGS = 10V, (Figures 17, 18)

MOSFET switching times are essentially indepen-

dent of operating temperature

- - 35 ns

Rise Time tr- - 65 ns

Turn-Off Delay Time tD(OFF) - - 150 ns

Fall Time tf- - 75 ns

Total Gate Charge

(Gate to Source + Gate to Drain) QgVGS = 10V, ID = 18A, VDS = 0.8 x Rated BVDSS,

IG(REF) = 1.5mA (Figures 14, 19, 20)

Gate charge is essentially independent of operating

temperature

- 79 120 nC

Gate to Source Charge Qgs -38- nC

Gate to Drain “Miller” Charge Qgd -41- nC

Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1.0MHz, (Figure 11) - 2000 - pF

Output Capacitance COSS - 400 - pF

Reverse Transfer Capacitance CRSS - 100 - pF

Internal Drain Inductance LDMeasured Between the

Contact Screw on Head-

er that is Closer to

Source and Gate Pins

and Center of Die

Modified MOSFET Sym-

bol Showing the Internal

Devices

Inductances

- 5.0 - nH

Internal Source Inductance LSMeasured From The

Source Lead, 6mm

(0.25in) From Header to

Source Bonding Pad

- 12.5 - nH

Thermal Resistance Junction to Case RθJC - 0.83 - oC/W

Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 30 oC/W

IRF350

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current ISD Modified MOSFET

Symbol Showing the In-

tegral Reverse P-N

Junction Diode

- - 15 A

Pulse Source to Drain Current

(Note 3) ISDM - - 60 A

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 15A, VGS = 0V, (Figure 13) - - 1.6 V

Reverse Recovery Time trr TJ = 150oC, ISD = 15A, dISD/dt = 100A/µs - 1000 - ns

Reverse Recovered Charge QRR TJ = 150oC, ISD = 15A, dISD/dt = 100A/µs - 6.6 - µC

NOTES:

2. Pulse Test: Pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive Rating: Pulse width is limited by Maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 40V, starting TJ = 25oC, L = 5.66µH, RG = 50Ω, peak IAS = 15A. (Figures 15, 16).

Typical Performance Curves

Unless Otherwise Speciﬁed

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

0 50 100 150

TC, CASE TEMPERATURE (oC)

POWER DISSIPATION MULTIPLIER

0.2

0.4

0.6

0.8

1.0

1.2

TC, CASE TEMPERATURE (oC)

50 75 10025 150

ID, DRAIN CURRENT (A)

125

ZθJC, NORMALIZED

1.0

0.1

10-2

10-5 10-4 10-3 0.1 1 10

t1, RECTANGULAR PULSE DURATION (S)

0.01

SINGLE PULSE DUTY FACTOR: D = t1/t2

NOTES:

TJ= PD x ZθJC x RθJC + TC

PDM

t1t2

0.01

0.05

0.1

0.2

0.5

0.02

THERMAL IMPEDANCE

IRF350

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

1.0 10 100

0.1

ID, DRAIN CURRENT (A)

VDS, DRAIN TO SOURCE VOLTAGE (V) 500

100

OPERATION IN THIS

REGION IS LIMITED

BY rDS(ON)

TJ = MAX RATED

SINGLE PULSE

TC = 25oC

1ms

10ms

100ms

100µs

10µs

25 5020 200 VDS, DRAIN TO SOURCE VOLTAGE (V)

50 100 150 2000 250

ID, DRAIN CURRENT (A)

PULSE DURATION = 80µs

VGS = 6.0V

VGS = 3.5V

300

VGS = 5.5V

VGS = 5.0V

VGS = 4.5V

VGS = 4.0V

VDS, DRAIN TO SOURCE VOLTAGE (V)

123405

ID, DRAIN CURRENT (A)

PULSE DURATION = 80µs

VGS = 5.0V

VGS = 4.0V

VGS = 10V

VGS = 3.5V

VGS = 4.5V

IDS(ON), DRAIN TO SOURCE CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

0 123 78

TJ = 125oC

TJ = 25oC

PULSE DURATION = 80µs

VDS > ID(ON) x rDS(ON)MAX

645

TJ = -55oC

ID, DRAIN CURRENT (A)

10 20 30

050

0.8

0.7

0.6

0.5

rDS(ON), DRAIN TO SOURCE

VGS = 20V

0.4

VGS = 10V

ON RESISTANCE (Ω)

0.3

0.2

60 70

rDS(ON) MEASURED WITH CURRENT PULSE OF

2.0µs DURATION. INITIAL TJ = 25oC.

(HEATING EFFECT OF 2.0µs PULSE IS MINIMAL)

2.2

1.4

0.6

TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

1.8

1.0

0.2 120

ON RESISTANCE

ID = 8A

-40 40

VGS = 10V

160

IRF350

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

1.25

1.05

0.85

TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

1.15

0.95

0.75

BREAKDOWN VOLTAGE

0-40 40 80 120 160 010

C, CAPACITANCE (pF)

VDS, DRAIN TO SOURCE VOLTAGE (V)

4000

3200

2400

1600

800

020 30

VGS = 0V, f = 1MHz

CISS = CGS + CGD

CRSS = CGD

COSS ≈ CDS + CGD

CISS

COSS

CRSS

40 50

ID, DRAIN CURRENT (A)

4 8 12 16020

gfs, TRANSCONDUCTANCE (S)

TJ = 25oC

TJ = -55oC

TJ = 125oC

PULSE DURATION = 80µs

VDS > ID(ON) x rDS(ON)MAX

ISD, SOURCE TO DRAIN CURRENT (A)

VSD, SOURCE TO DRAIN VOLTAGE (V)

102

101234

TJ = 25oC

TJ = 150oC

TJ = 25oC

Qg(TOT), TOTAL GATE CHARGE (nC)

28 56 84 1120 140

VGS, GATE TO SOURCE VOLTAGE (V)

ID = 18A

VDS = 80V

VDS = 200V

VDS = 320V

IRF350

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

VGS

0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VDD

VDS

BVDSS

IAS

tAV

VGS

DUT

-VDD

tON

td(ON)

90%

10%

VDS 90%

10%

td(OFF)

tOFF

90%

50%

10% PULSE WIDTH

VGS

0.3µF

12V

BATTERY 50kΩ

VDS

DUT

IG(REF)

(ISOLATED

VDS

0.2µF

CURRENT

REGULATOR

ID CURRENT

SAMPLING

IG CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR

SAME TYPE

AS DUT Qg(TOT)

Qgd

Qgs

VDS

VGS

VDD

IG(REF)

IRF350

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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IRF350