BLF6G15L-250PBRN Power LDMOS transistor Rev. 2 -- 3 November 2010 Product data sheet 1. Product profile 1.1 General description 250 W LDMOS power transistor for base station applications at frequencies from 1450 MHz to 1550 MHz. Table 1. Typical performance Typical RF performance at Tcase = 25 C in a class-AB production test circuit. Mode of operation f VDS PL(AV) (MHz) (V) (W) 2C-WCDMA 1476 to 1511 28 60 [1] D ACPR (dB) (%) (dBc) 18.5 33.0 -32[1] Gp Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier. Carrier spacing 5 MHz. CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling. 1.2 Features and benefits Typical 2C-WCDMA performance at frequencies of 1476 MHz and 1511 MHz, a supply voltage of 28 V and an IDq of 1410 mA: Average output power = 60 W Power gain = 18.5 dB Efficiency = 33.0 % ACPR = -32 dBc Easy power control Integrated ESD protection Enhanced ruggedness High efficiency Excellent thermal stability Designed for broadband operation (1450 MHz to 1550 MHz) Internally matched for ease of use Compliant to Restriction of Hazardous Substances (RoHS) Directive 2002/95/EC Integrated current sense BLF6G15L-250PBRN NXP Semiconductors Power LDMOS transistor 1.3 Applications RF power amplifiers for GSM, GSM EDGE, CDMA and W-CDMA and multi carrier applications in the 1450 MHz to 1550 MHz frequency range 2. Pinning information Table 2. Pinning Pin Description 1 drain1 2 drain2 3 gate1 4 gate2 5 source 6, 7 sense drain 8, 9 sense gate [1] Simplified outline 6 1 2 7 8 3 4 9 Graphic symbol 6, 7 1 3 5 8, 9 4 [1] 5 2 sym127 Connected to flange. 3. Ordering information Table 3. Ordering information Type number Package Name Description Version BLF6G15L-250PBRN - SOT1110A flanged LDMOST ceramic package; 2 mounting holes; 8 leads 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Min Max Unit VDS drain-source voltage Conditions - 65 V VGS gate-source voltage -0.5 +11 V ID drain current - 64 A Tstg storage temperature -65 +150 C Tj junction temperature - 200 C 5. Thermal characteristics Table 5. Symbol Thermal characteristics Parameter Rth(j-case) thermal resistance from junction to case BLF6G15L-250PBRN Product data sheet Conditions Typ Tcase = 80 C; PL = 60 W (CW) 0.29 K/W All information provided in this document is subject to legal disclaimers. Rev. 2 -- 3 November 2010 Unit (c) NXP B.V. 2010. All rights reserved. 2 of 13 BLF6G15L-250PBRN NXP Semiconductors Power LDMOS transistor 6. Characteristics Table 6. Characteristics Tj = 25 C per section; unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 1.8 mA 65 75 - V 1.9 2.4 V VGS(th) gate-source threshold voltage VDS = 10 V; ID = 180 mA 1.4 IDq quiescent drain current sense transistor: 1.31 1.41 1.51 A IDS= 20.1 mA; VDS = 12 V main transistor: VDS = 28 V 2.8 A 25.3 29 - A 280 nA IDSS drain leakage current VGS = 0 V; VDS = 28 V - IDSX drain cut-off current VGS = VGS(th) + 3.75 V; VDS = 10 V - IGSS gate leakage current VGS = 11 V; VDS = 0 V - - gfs forward transconductance VDS = 10 V; ID = 9 A 8.1 11.3 - RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V; ID = 6.3 A 0.03 0.1 S 0.16 7. Application information Table 7. RF performance Mode of operation: 2-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test model 1; 64 DPCH; f1 = 1473.4 MHz; f2 = 1478.4 MHz; f3 = 1508.4 MHz; f4 = 1513.4 MHz; RF performance at VDS = 28 V; IDq = 1410 mA; Tcase = 25 C; unless otherwise specified in a class-AB production test circuit. Symbol Parameter PL(AV) average output power Conditions Gp power gain RLin input return loss Min Typ Max Unit - 60 - W PL(AV) = 60 W 16.5 18.5 - dB PL(AV) = 60 W 8 12 - dB D drain efficiency PL(AV) = 60 W 30 33 - % ACPR adjacent channel power ratio PL(AV) = 60 W - -32 -27 dBc Table 8. PAR performance Mode of operation; 1-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test model 1; 64 DPCH; f1 = 1510.9 MHz; RF performance at VDS = 28 V; IDq = 1410 mA; Tcase = 25 C; unless otherwise specified in a class-AB production test circuit. Symbol Parameter PARO BLF6G15L-250PBRN Product data sheet output peak-to-average ratio Conditions Min Typ Max Unit PL(AV) = 120 W at 0.01 % probability on CCDF 3.4 4.2 - dB All information provided in this document is subject to legal disclaimers. Rev. 2 -- 3 November 2010 (c) NXP B.V. 2010. All rights reserved. 3 of 13 BLF6G15L-250PBRN NXP Semiconductors Power LDMOS transistor Table 9. Phase binning Off state S11 measurement; VDS = 28 V; VGS = 0 V Marking code Input Resonance Frequency (GHz) Min Max 1 1.85 1.89 2 1.89 1.93 3 1.93 1.97 Table 10. Gain binning Mode of operation: 2-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test model 1; 64 DPCH; f1 = 1473.4 MHz, f2 = 1478.4 MHz; PL(AV) = 60 W; VDS = 28 V; IDq = 1410 mA Marking code Gain at a center frequency of 1475.9 MHz in dB Min Max BT 17.0 17.5 BU 17.5 18.0 BW 18.0 18.5 BX 18.5 19.0 7.1 Ruggedness in class-AB operation The BLF6G15L-250PBRN is capable of withstanding a load mismatch corresponding to VSWR = 10 : 1 through all phases under the following conditions: VDS = 28 V; IDq = 1410 mA; PL = 200 W; f = 1475 MHz. 7.2 Impedance information Table 11. Typical impedance per section IDq = 950 mA; main transistor VDS = 28 V f ZS[1] ZL[1] (MHz) () () 1480 1.1 - j2.8 2.3 - j3.2 1510 1.3 - j2.8 2.1 - j2.8 [1] ZS and ZL defined in Figure 1. drain ZL gate ZS 001aaf059 Fig 1. BLF6G15L-250PBRN Product data sheet Definition of transistor impedance All information provided in this document is subject to legal disclaimers. Rev. 2 -- 3 November 2010 (c) NXP B.V. 2010. All rights reserved. 4 of 13 BLF6G15L-250PBRN NXP Semiconductors Power LDMOS transistor 7.3 Graphs 7.3.1 CW 014aab101 21 (2) Gp (dB) D (3) 20 D (%) 50 014aab102 18 60 (1) RLin (dB) (1) 14 (2) 40 19 Gp (1) (3) (2) 30 18 (3) 10 20 17 16 0 50 100 150 6 10 200 250 PL (W) 0 50 (1) f = 1475 MHz (1) f = 1475 MHz (2) f = 1493 MHz (2) f = 1493 MHz (3) f = 1511 MHz (3) f = 1511 MHz Fig 2. Power gain and drain efficiency as function of output power; typical values BLF6G15L-250PBRN Product data sheet Fig 3. 100 150 200 250 PL (W) Input return loss as a function of output power; typical values All information provided in this document is subject to legal disclaimers. Rev. 2 -- 3 November 2010 (c) NXP B.V. 2010. All rights reserved. 5 of 13 BLF6G15L-250PBRN NXP Semiconductors Power LDMOS transistor 7.3.2 IS-95 014aab099 20 Gp (dB) D (%) (1) Gp 19 (3) 014aab100 -25 50 (2) (3) ACPR (dBc) -35 9 ACPR1980k (3) 30 D (3) PAR (2) -45 (1) 18 ACPR885k (1) 40 (2) 11 -55 (1) (2) (2) (1) 7 5 (3) 17 20 16 0 40 80 10 160 120 -65 -75 PAR 0 40 PL (W) IS-95: PAR = 9.8 dB at 0.01 % probability of the CCDF. (1) f = 1475 MHz (1) f = 1475 MHz (2) f = 1493 MHz (2) f = 1493 MHz (3) f = 1511 MHz (3) f = 1511 MHz Power gain and drain efficiency as function of output power; typical values BLF6G15L-250PBRN Product data sheet 1 160 120 PL (W) IS-95: PAR = 9.8 dB at 0.01 % probability of the CCDF. Fig 4. 80 3 Fig 5. Adjacent channel power ratio and peak-to-average power ratio as function of output power; typical values All information provided in this document is subject to legal disclaimers. Rev. 2 -- 3 November 2010 (c) NXP B.V. 2010. All rights reserved. 6 of 13 BLF6G15L-250PBRN NXP Semiconductors Power LDMOS transistor 7.3.3 2C-WCDMA (5 MHz spacing) 014aab097 21 Gp (dB) D (%) Gp (3) (2) 20 014aab098 -20 50 40 -25 ACPR (dBc) -30 ACPR10M -35 (2) (1) (2) -40 D 7.5 (2) (1) 30 (3) 7 (3) (3) (1) (2) 18 -45 20 PAR -50 -55 10 120 17 40 80 6.5 6 0 40 5.5 120 80 PL (W) PL (W) 3GPP: Test Model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability per carrier; 5 MHz carrier spacing. 3GPP: Test Model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability per carrier; 5 MHz carrier spacing. (1) f = 1475 MHz (1) f = 1475 MHz (2) f = 1493 MHz (2) f = 1493 MHz (3) f = 1511 MHz (3) f = 1511 MHz Fig 6. 8.0 (3) 19 0 PAR 8.5 (1) (1) 9 ACPR5M Power gain and drain efficiency as function of output power; typical values Fig 7. Adjacent channel power ratio and peak-to-average power ratio as function of output power; typical values 8. Test information Table 12. List of components See Figure 8 for component layout. Component Description Value Remarks C1, C2, C3, C4 multi layer ceramic chip capacitor 100 pF [1] C5, C6 multi layer ceramic chip capacitor 10 F [2] C7 multi layer ceramic chip capacitor 10 nF [2] on input gate line as shown C8 multi layer ceramic chip capacitor 100 nF [2] C10 multi layer ceramic chip capacitor 2.4 pF [1] C11 multi layer ceramic chip capacitor 3.6 pF [3] C12 electrolytic capacitor 470 F; 63 V C13, C14, C15, C16 multi layer ceramic chip capacitor 33 pF R1 chip resistor 3.9 k R2 chip resistor 2.2 k Philips 0603 R3 chip resistor 10 Philips 0603 R4 chip resistor 0 Philips 0603 [1] [3] Philips 0603 American Technical Ceramics type 800B or capacitor of same quality. [2] TDK or capacitor of same quality. [3] American Technical Ceramics type 100B or capacitor of same quality. BLF6G15L-250PBRN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 3 November 2010 (c) NXP B.V. 2010. All rights reserved. 7 of 13 BLF6G15L-250PBRN NXP Semiconductors Power LDMOS transistor - C7 R2 + C12 R4 R1 C8 R3 C1 C5 C3 C15 C13 C11 C10 NXP BLF6G15L-250BPRN Output Rev 03 C14 NXP BLF6G15L-250BPRN input Rev 03 C6 C16 C4 C2 014aab104 Printed-Circuit Board (PCB): Taconic RF-35A2; r = 3.5 F/m; thickness = 0.762 mm; thickness copper plating = 35 m. The vias can be as a reference to place components. The above layout shows the test circuit used to measure the devices in production. A more appropriate application demonstration for specific customer needs can be provided. See Table 12 for list of components. Fig 8. Component layout BLF6G15L-250PBRN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 3 November 2010 (c) NXP B.V. 2010. All rights reserved. 8 of 13 BLF6G15L-250PBRN NXP Semiconductors Power LDMOS transistor 9. Package outline Flanged LDMOST ceramic package; 2 mounting holes; 8 leads SOT1110A D A F L D1 6 U1 B q C H1 w2 1 c D 7 2 U2 H p Z E1 E 5 A 8 3 9 4 b1 b w3 e w1 Q A B w3 Z 5.97 64 5.72 62 0.25 0 5 0.235 64 10 mm 0.01 scale 0.225 62 Dimensions Unit(1) mm A max 5.36 nom min 3.99 b 1.14 b1 c D e D1 E E1 F H H1 L 9.50 9.53 1.75 17.12 25.53 2.67 11.81 0.18 31.55 31.52 p Q(2) 3.30 2.26 13.72 0.89 11.56 0.10 30.94 30.96 q 9.30 9.27 1.50 16.10 25.27 2.41 3.05 References JEDEC JEITA 0.25 0.51 41.02 10.03 2.01 1.625 0.405 1.4 0.01 0.02 1.615 0.395 sot1110a_po European projection Issue date 09-11-20 10-02-02 SOT1110A Fig 9. w2 41.28 10.29 Note 1. millimeter dimensions are derived from the original inch dimensions. 2. dimension is measured 0.030 inch (0.76 mm) from the body. 3. recommended screw pitch dimension of 1.52 inch (38.6 mm) based on M3 screw. IEC w1 U2 35.56 0.374 0.375 0.069 0.674 1.005 0.105 0.13 0.089 max 0.211 0.045 0.465 0.007 1.242 1.241 0.540 inches nom 0.366 0.365 0.059 0.634 0.995 0.095 0.12 0.079 min 0.157 0.035 0.455 0.004 1.218 1.219 Outline version U1 Package outline SOT1110A BLF6G15L-250PBRN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 3 November 2010 (c) NXP B.V. 2010. All rights reserved. 9 of 13 BLF6G15L-250PBRN NXP Semiconductors Power LDMOS transistor 10. Abbreviations Table 13. Abbreviations Acronym Description CCDF Complementary Cumulative Distribution Function CDMA Code Division Multiple Access CW Continuous Wave EDGE Enhanced Data rates for GSM Evolution DPCH Dedicated Physical CHannel GSM Global System for Mobile communications IS-95 Interim Standard 95 LDMOS Laterally Diffused Metal-Oxide Semiconductor LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor PAR Peak-to-Average power Ratio RF Radio Frequency VSWR Voltage Standing-Wave Ratio W-CDMA Wideband Code Division Multiple Access 11. Revision history Table 14. Revision history Document ID Release date Data sheet status BLF6G15L-250PBRN v.2 20101103 Product data sheet - BLF6G15L-250PBRN v.1 BLF6G15L-250PBRN v.1 20100914 Preliminary data sheet - - BLF6G15L-250PBRN Product data sheet Change notice All information provided in this document is subject to legal disclaimers. Rev. 2 -- 3 November 2010 Supersedes (c) NXP B.V. 2010. All rights reserved. 10 of 13 BLF6G15L-250PBRN NXP Semiconductors Power LDMOS transistor 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term `short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. 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Export might require a prior authorization from national authorities. BLF6G15L-250PBRN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 3 November 2010 (c) NXP B.V. 2010. All rights reserved. 11 of 13 BLF6G15L-250PBRN NXP Semiconductors Power LDMOS transistor Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. 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Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com BLF6G15L-250PBRN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 3 November 2010 (c) NXP B.V. 2010. All rights reserved. 12 of 13 NXP Semiconductors BLF6G15L-250PBRN Power LDMOS transistor 14. Contents 1 1.1 1.2 1.3 2 3 4 5 6 7 7.1 7.2 7.3 7.3.1 7.3.2 7.3.3 8 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics . . . . . . . . . . . . . . . . . . 2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Application information. . . . . . . . . . . . . . . . . . . 3 Ruggedness in class-AB operation . . . . . . . . . 4 Impedance information . . . . . . . . . . . . . . . . . . . 4 Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 IS-95 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2C-WCDMA (5 MHz spacing). . . . . . . . . . . . . . 7 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 3 November 2010 Document identifier: BLF6G15L-250PBRN