www.ti.com
FEATURES DESCRIPTION
APPLICATIONS
TPS732xx
GNDEN NR
IN OUT
VIN VOUT
Optional
Optional Optional
Typical Application Circuit for Fixed-Voltage Versions
DCQ PACKAGE
SOT223
(TOP VIEW)
1 2 3 4 5
IN OUTGND
NR/FBEN
TAB IS GND
DBV PACKAGE
SOT23
(TOP VIEW)
IN
GND
EN NR/FB
OUT1
2
3 4
5
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
Cap-Free, NMOS, 250mA Low Dropout Regulatorwith Reverse Current Protection
•Stable with No Output Capacitor or Any Value
The TPS732xx family of low-dropout (LDO) voltageor Type of Capacitor
regulators uses a new topology: an NMOS passelement in a voltage-follower configuration. This top-•Input Voltage Range: 1.7V to 5.5V
ology is stable using output capacitors with low ESR,•Ultralow Dropout Voltage: 40mV Typ at 250mA
and even allows operation without a capacitor. It also•Excellent Load Transient Response—with or
provides high reverse blockage (low reverse current)without Optional Output Capacitor
and ground pin current that is nearly constant over allvalues of output current.•New NMOS Topology Provides Low ReverseLeakage Current
The TPS732xx uses an advanced BiCMOS processto yield high precision while delivering very low•Low Noise: 30µV
RMS
Typ (10kHz to 100kHz)
dropout voltages and low ground pin current. Current•0.5% Initial Accuracy
consumption, when not enabled, is under 1µA and•1% Overall Accuracy (Line, Load, and
ideal for portable applications. The extremely lowTemperature)
output noise (30µV
RMS
with 0.1µF C
NR
) is ideal forpowering VCOs. These devices are protected by•Less Than 1µA Max I
Q
in Shutdown Mode
thermal shutdown and foldback current limit.•Thermal Shutdown and Specified Min/MaxCurrent Limit Protection•Available in Multiple Output Voltage Versions– Fixed Outputs of 1.2V, 1.5V, 1.6V, 1.8V, 2.5V,3.0V, 3.3V, and 5.0V– Adjustable Outputs From 1.20V to 5.5V– Custom Outputs Available
•Portable/Battery-Powered Equipment•Post-Regulation for Switching Supplies•Noise-Sensitive Circuitry such as VCOs•Point of Load Regulation for DSPs, FPGAs,ASICs, and Microprocessors
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2004, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
www.ti.com
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integratedcircuits be handled with appropriate precautions. Failure to observe proper handling and installationprocedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precisionintegrated circuits may be more susceptible to damage because very small parametric changes couldcause the device not to meet its published specifications.
ORDERING INFORMATION
SPECIFIEDPACKAGE-LEAD PACKAGE ORDERINGPRODUCT V
OUT
(1)
TEMPERATURE TRANSPORT MEDIA,(DESIGNATOR)
(2)
MARKING NUMBERRANGE QUANTITY
TPS73201DBVT Tape and Reel, 250SOT23-5 (DBV) -40 °C to +125 °C PJEQ
TPS73201DBVR Tape and Reel, 3000AdjustableTPS73201
or 1.2V
(3)
TPS73201DCQT Tube, 80SOT223-5 (DCQ) -40 °C to +125 °C PS73201
TPS73201DCQR Tape and Reel, 2500TPS73215DBVT Tape and Reel, 250SOT23-5 (DBV) -40 °C to +125 °C T38
TPS73215DBVR Tape and Reel, 3000TPS73215 1.5V
TPS73215DCQT Tube, 80SOT223-5 (DCQ) -40 °C to +125 °C PS73215
TPS73215DCQR Tape and Reel, 2500TPS73216DBVT Tape and Reel, 250TPS73216 1.6V SOT23-5 (DBV) -40 °C to +125 °C T50
TPS73216DBVR Tape and Reel, 3000TPS73218DBVT Tape and Reel, 250SOT23-5 (DBV) -40 °C to +125 °C T37
TPS73218DBVR Tape and Reel, 3000TPS73218 1.8V
TPS73218DCQT Tube, 80SOT223-5 (DCQ) -40 °C to +125 °C PS73218
TPS73218DCQR Tape and Reel, 2500TPS73225DBVT Tape and Reel, 250SOT23-5 (DBV) -40 °C to +125 °C T36
TPS73225DBVR Tape and Reel, 3000TPS73225 2.5V
TPS73225DCQT Tube, 80SOT223-5 (DCQ) -40 °C to +125 °C PS73225
TPS73225DCQR Tape and Reel, 2500TPS73230DBVT Tape and Reel, 250SOT23-5 (DBV) -40 °C to +125 °C T39
TPS73230DBVR Tape and Reel, 3000TPS73230 3.0V
TPS73230DCQT Tube, 80SOT223-5 (DCQ) -40 °C to +125 °C PS73230
TPS73230DCQR Tape and Reel, 2500TPS73233DBVT Tape and Reel, 250SOT23-5 (DBV) -40 °C to +125 °C T40
TPS73233DBVR Tape and Reel, 3000TPS73233 3.3V
TPS73233DCQT Tube, 80SOT223-5 (DCQ) -40 °C to +125 °C PS73233
TPS73233DCQR Tape and Reel, 2500TPS73250DBVT Tape and Reel, 250SOT23-5 (DBV) -40 °C to +125 °C T41
TPS73250DBVR Tape and Reel, 3000TPS73250 5.0V
TPS73250DCQT Tube, 80SOT223-5 (DCQ) -40 °C to +125 °C PS73250
TPS73250DCQR Tape and Reel, 2500
(1) Custom output voltages from 1.3V to 4V in 100mV increments are available on a quick-turn basis for prototyping. Production quantitiesare available; minimum order quantities apply. Contact factory for details and availability.(2) For the most current specification and package information, refer to the Package Option Addendum located at the end of this datasheet.(3) For fixed 1.2V operation, tie FB to OUT.
2
www.ti.com
ABSOLUTE MAXIMUM RATINGS
POWER DISSIPATION RATINGS
(1)
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
over operating junction temperature range unless otherwise noted
(1)
TPS732xx UNIT
V
IN
range -0.3 to 6.0 VV
EN
range -0.3 to 6.0 VV
OUT
range -0.3 to 5.5 VPeak output current Internally limitedOutput short-circuit duration IndefiniteContinuous total power dissipation See Dissipation Ratings TableJunction temperature range, T
J
-55 to +150 °CStorage temperature range -65 to +150 °CESD rating, HBM 2 kVESD rating, CDM 500 V
(1) Stresses beyond those listedunder absolute maximum ratingsmay cause permanent damage to the device. These are stress ratingsonly, andfunctional operation of the device at these or any other conditions beyondthose indicated under the Electrical Characteristics isnot implied. Exposureto absolute maximum rated conditions for extended periods may affect devicereliability.
DERATING FACTOR T
A
≤25 °C T
A
= 70 °C T
A
= 85 °CBOARD PACKAGE R
ΘJC
R
ΘJA
ABOVE T
A
= 25 °C POWER RATING POWER RATING POWER RATING
Low-K
(2)
DBV 64 °C/W 255 °C/W 3.9mW/ °C 390mW 215mW 155mWHigh-K
(3)
DBV 64 °C/W 180 °C/W 5.6mW/ °C 560mW 310mW 225mWLow-K
(2)
DCQ 15 °C/W 53 °C/W 18.9mW/ °C 1.89W 1.04W 0.76W
(1) See Power Dissipation in the Applications section formore information related to thermal design.(2) The JEDEC Low-K (1s) boarddesign used to derive this data was a 3 inch x 3 inch, two-layer board with2-ounce copper traces on top ofthe board.(3) The JEDEC High-K (2s2p)board design used to derive this data was a 3 inch x 3 inch, multilayer boardwith 1-ounce internal power andground planes and 2-ounce copper traces on thetop and bottom of the board.
3
www.ti.com
ELECTRICAL CHARACTERISTICS
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
Over operating temperature range (T
J
= -40 °C to +125 °C), V
IN
= V
OUT(nom)
+ 0.5V
(1)
, I
OUT
= 10mA, V
EN
= 1.7V, andC
OUT
= 0.1µF, unless otherwise noted. Typical values are at T
J
= 25 °C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IN
Input voltage range
(1)
1.7 5.5 VV
FB
Internal reference (TPS73201) T
J
= 25 °C 1.198 1.20 1.210 VOutput voltage range (TPS73201)
(2)
V
FB
5.5-V
DO
VNominal T
J
= 25 °C -0.5 +0.5V
OUT
Accuracy
(1)
%V
OUT
+ 0.5V ≤V
IN
≤5.5V;V
IN
, I
OUT
, and T -1.0 ±0.5 +1.010 mA ≤I
OUT
≤250mA∆V
OUT
%/ ∆V
IN
Line regulation
(1)
V
OUT(nom)
+ 0.5V ≤V
IN
≤5.5V 0.01 %/V1mA ≤I
OUT
≤250mA 0.002∆V
OUT
%/ ∆I
OUT
Load regulation %/mA10mA ≤I
OUT
≤250mA 0.0005Dropout voltage
(3)V
DO
I
OUT
= 250mA 40 150 mV(V
IN
= V
OUT
(nom) - 0.1V)Z
O
(DO) Output impedance in dropout 1.7 V ≤V
IN
≤V
OUT
+ V
DO
0.25 ΩI
CL
Output current limit V
OUT
= 0.9 ×V
OUT(nom)
250 425 600 mAI
SC
Short-circuit current V
OUT
= 0V 300 mAI
REV
Reverse leakage current
(4)
(-I
IN
) V
EN
≤0.5V, 0V ≤V
IN
≤V
OUT
0.1 10 µAI
OUT
= 10mA (I
Q
) 400 550I
GND
Ground pin current µAI
OUT
= 250mA 650 950I
SHDN
Shutdown current (I
GND
) V
EN
≤0.5V, V
OUT
≤V
IN
≤5.5 0.02 1 µAI
FB
FB pin current (TPS73201) .1 .3 µAf = 100Hz, I
OUT
= 250 mA 58Power-supply rejection ratioPSRR dB(ripple rejection)
f = 10kHz, I
OUT
= 250 mA 37C
OUT
= 10µF, No C
NR
27 ×V
OUTOutput noise voltageV
N
µV
RMSBW = 10Hz - 100kHz
C
OUT
= 10µF, C
NR
= 0.01µF 8.5 ×V
OUT
V
OUT
= 3V, R
L
= 30 Ωt
STR
Startup time 600 µsC
OUT
= 1 µF, C
NR
= 0.01 µFV
EN
(HI) Enable high (enabled) 1.7 V
IN
VV
EN
(LO) Enable low (shutdown) 0 0.5 VI
EN
(HI) Enable pin current (enabled) V
EN
= 5.5V 0.02 0.1 µAShutdown Temp increasing 160T
SD
Thermal shutdown temperature °CReset Temp decreasing 140T
J
Operating junction temperature -40 125 °C
(1) Minimum V
IN
= V
OUT
+V
DO
or 1.7V, whichever isgreater.(2) TPS73201 is tested atV
OUT
= 2.5V.(3) V
DO
is not measured for the TPS73214, TPS73215 orTPS73216 since minimum V
IN
=1.7V.(4) Fixed-voltage versions only;refer to Applicationssection for more information.
4
www.ti.com
Servo
Error
Amp
Ref
27kΩ
8kΩ
Current
Limit
Charge
Pump
Thermal
Protection
Bandgap
NR
OUT
R1
R2
EN
GND
IN
R1+ R2= 80kΩ
VOUT
1.2V
1.5V
1.8V
2.5V
2.8V
3.0V
3.3V
5.0V
R1
Short
23.2kΩ
28.0kΩ
39.2kΩ
44.2kΩ
46.4kΩ
52.3kΩ
78.7kΩ
R2
Open
95.3kΩ
56.2kΩ
36.5kΩ
33.2kΩ
30.9kΩ
30.1kΩ
24.9kΩ
Table 1. Standard 1%
Resistor Values for
Common Output Voltages
NOTE: VOUT = (R1 + R2)/R2 × 1.2 04;
R1R2 ≅ 19kΩ for be s t
accuracy.
Servo
Error
Amp
Ref
Current
Limit
Charge
Pump
Thermal
Protection
Bandgap
OUT
FB
R1
R2
EN
GND
IN
80kΩ
8kΩ
27kΩ
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
FUNCTIONAL BLOCK DIAGRAMS
Figure 1. Fixed Voltage Version
Figure 2. Adjustable Voltage Version
5
www.ti.com
PIN ASSIGNMENTS
DCQ PACKAGE
SOT223
(TOP VIEW)
1 2 3 4 5
IN OUTGND
NR/FBEN
TAB IS GND
DBV PACKAGE
SOT23
(TOP VIEW)
IN
GND
EN NR/FB
OUT1
2
3 4
5
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
TERMINAL FUNCTIONS
TERMINAL
SOT23 SOT223
DESCRIPTIONNAME (DBV) (DCQ)PIN NO. PIN NO.
IN 1 1 Unregulated input supplyGND 2 3 GroundEN 3 5 Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator intoshutdown mode. Refer to the Shutdown section under Applications Information for more details.EN can be connected to IN if not used.NR 4 4 Fixed voltage versions only—connecting an external capacitor to this pin bypasses noisegenerated by the internal bandgap. This allows output noise to be reduced to very low levels.FB 4 4 Adjustable voltage version only—this is the input to the control loop error amplifier, and is used toset the output voltage of the device.OUT 5 2 Output of the Regulator. There are no output capacitor requirements for stability.
6
www.ti.com
TYPICAL CHARACTERISTICS
0.5
0.4
0.3
0.2
0.1
0
−0.1
−0.2
−0.3
−0.4
−0.5
Change in VOUT (%)
0 50 100 150 200 250
IOUT (mA)
Referred to IOUT = 10mA
−40C
+125C
+25C
0.20
0.15
0.10
0.05
0
−0.05
−0.10
−0.15
−0.20
Change in VOUT (%)
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VIN −VOUT (V)
+125C+25C
−40C
Referred to VIN = VOUT + 0.5V at IOUT = 10mA
30
25
20
15
10
5
0
Percent of Units (%)
−1.0
−0.9
−0.8
−0.7
−0.6
−0.5
−0.4
−0.3
−0.2
−0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
VOUT Error (%)
IOUT = 10mA
18
16
14
12
10
8
6
4
2
0
Percent of Units (%)
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10
20
30
40
50
60
70
80
90
100
Worst Case dVOUT/dT (ppm/C)
IOUT = 10mA
All Voltage Versions
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
For all voltage versions at T
J
= 25 °C, V
IN
= V
OUT(nom)
+ 0.5V, I
OUT
= 10mA, V
EN
= 1.7V, and C
OUT
= 0.1µF, unless otherwisenoted.
LOAD REGULATION LINE REGULATION
Figure 3. Figure 4.
DROPOUT VOLTAGE vs OUTPUT CURRENT DROPOUT VOLTAGE vs TEMPERATURE
Figure 5. Figure 6.
OUTPUT VOLTAGE ACCURACY HISTOGRAM OUTPUT VOLTAGE DRIFT HISTOGRAM
Figure 7. Figure 8.
7
www.ti.com
1000
900
800
700
600
500
400
300
200
100
0
IGND (µA)
0 50 100 150 200 250
IOUT (mA)
VIN = 5.5V
VIN = 4V
VIN = 2V
800
700
600
500
400
300
200
100
0
IGND (µA)
−50 −25 0 25 50 75 100 125
Temperature (C)
IOUT = 250mA
VIN = 5.5V
VIN = 4V
VIN = 2V
500
450
400
350
300
250
200
150
100
50
0
Current Limit (mA)
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VOUT (V)
TPS73233
ICL
ISC
1
0.1
0.01
IGND (µA)
−50 −25 0 25 50 75 100 125
Temperature (C)
VENABLE = 0.5V
VIN = VOUT + 0.5V
600
550
500
450
400
350
300
250
Current Limit (mA)
1.5 2.5 3.0 3.5 4.0 4.5 5.02.0 5.5
VIN (V)
600
550
500
450
400
350
300
250
Current Limit (mA)
−50 −25 0 25 50 75 100 125
Temperature (C)
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS (continued)For all voltage versions at T
J
= 25 °C, V
IN
= V
OUT(nom)
+ 0.5V, I
OUT
= 10mA, V
EN
= 1.7V, and C
OUT
= 0.1µF, unless otherwisenoted.
GROUND PIN CURRENT vs OUTPUT CURRENT GROUND PIN CURRENT vs TEMPERATURE
Figure 9. Figure 10.
CURRENT LIMIT vs V
OUT
GROUND PIN CURRENT in SHUTDOWN(FOLDBACK) vs TEMPERATURE
Figure 11. Figure 12.
CURRENT LIMIT vs V
IN
CURRENT LIMIT vs TEMPERATURE
Figure 13. Figure 14.
8
www.ti.com
10k10
90
80
70
60
50
40
30
20
10
0
Ripple Rejection (dB)
100 1k 100k 1M 10M
Frequency (Hz)
IOUT = 1mA
COUT = 1µF
IOUT = Any
COUT = 0µF
IOUT = 1mA
COUT = Any
IOUT = 1mA
COUT = 10µF
IOUT = 100mA
COUT = Any
IOUT = 100mA
COUT = 10µF
IO=100mA
CO=1µF
1
0.1
0.01
eN(µV/√Hz)
10 100 1k 10k 100k
Frequency (Hz)
COUT = 1µF
COUT = 0µF
COUT = 10µF
IOUT = 150mA
1
0.1
0.01
eN(µV/√Hz)
10 100 1k 10k 100k
Frequency (Hz)
IOUT = 150mA
COUT = 1µF
COUT = 0µF
COUT = 10µF
60
50
40
30
20
10
0
VN(RMS)
COUT (µF)
0.1 1 10
VOUT = 5.0V
VOUT = 3.3V
VOUT = 1.5V
CNR = 0.01µF
10Hz < Frequency < 100kHz
140
120
100
80
60
40
20
0
VN(RMS)
CNR (F)
1p 10p 100p 1n 10n
VOUT = 5.0V
VOUT = 3.3V
VOUT = 1.5V
COUT = 0µF
10Hz < Frequency < 100kHz
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS (continued)For all voltage versions at T
J
= 25 °C, V
IN
= V
OUT(nom)
+ 0.5V, I
OUT
= 10mA, V
EN
= 1.7V, and C
OUT
= 0.1µF, unless otherwisenoted.
PSRR (RIPPLE REJECTION) vs FREQUENCY PSRR (RIPPLE REJECTION) vs V
IN
- V
OUT
Figure 15. Figure 16.
NOISE SPECTRAL DENSITY NOISE SPECTRAL DENSITYC
NR
= 0µF C
NR
= 0.01µF
Figure 17. Figure 18.
RMS NOISE VOLTAGE vs C
OUT
RMS NOISE VOLTAGE vs C
NR
Figure 19. Figure 20.
9
www.ti.com
10µs/div
50mV/tick
50mV/tick
50mV/tick
50mA/tick
VIN = 3.8V COUT = 0µF
COUT = 1µF
COUT = 10µF
10mA
250mA
VOUT
VOUT
VOUT
IOUT
10µs/div
50mV/div
50mV/div
1V/div
VOUT
VOUT
VIN
IOUT = 250mA
5.5V
4.5V
dVIN
dt = 0.5V/µs
COUT = 0µF
COUT = 100µF
100µs/div
1V/div
1V/div
RL= 20Ω
COUT = 10µF
2V
0V
RL= 1kΩ
COUT = 0µF
RL= 20Ω
COUT = 1µF
VOUT
VEN
100µs/div
1V/div
1V/div
RL= 20Ω
COUT = 10µF
2V
0V
RL= 1kΩ
COUT = 0µF
RL= 20Ω
COUT = 1µF
VOUT
VEN
6
5
4
3
2
1
0
−1
−2
Volts
50ms/div
VIN
VOUT
10
1
0.1
0.01
IENABLE (nA)
−50 −25 0 25 50 75 100 125
Temperature (°C)
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS (continued)For all voltage versions at T
J
= 25 °C, V
IN
= V
OUT(nom)
+ 0.5V, I
OUT
= 10mA, V
EN
= 1.7V, and C
OUT
= 0.1µF, unless otherwisenoted.
TPS73233 TPS73233LOAD TRANSIENT RESPONSE LINE TRANSIENT RESPONSE
Figure 21. Figure 22.
TPS73233 TPS73233TURN-ON RESPONSE TURN-OFF RESPONSE
Figure 23. Figure 24.
TPS73233
POWER UP / POWER DOWN I
ENABLE
vs TEMPERATURE
Figure 25. Figure 26.
10
www.ti.com
60
55
50
45
40
35
30
25
20
VN(rms)
CFB (F)
10p 100p 1n 10n
VOUT = 2.5V
COUT = 0µF
R1= 39.2kΩ
10Hz < Frequency < 100kHz
160
140
120
100
80
60
40
20
0
IFB (nA)
−50 −25 0 25 50 75 100 125
Temperature (C)
5µs/div
100mV/div
100mV/div
VOUT
VOUT
VIN
4.5V
3.5V
COUT = 0µF
VOUT = 2.5V
CFB = 10nF
COUT = 10µF
10µs/div
100mV/div
100mV/div
VOUT
VOUT
IOUT
250mA
10mA
COUT = 0µF
CFB = 10nF
R1= 39.2kΩ
COUT = 10µF
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS (continued)For all voltage versions at T
J
= 25 °C, V
IN
= V
OUT(nom)
+ 0.5V, I
OUT
= 10mA, V
EN
= 1.7V, and C
OUT
= 0.1µF, unless otherwisenoted.
TPS73101 TPS73201RMS NOISE VOLTAGE vs C
ADJ
I
FB
vs TEMPERATURE
Figure 27. Figure 28.
TPS73201 TPS73201LOAD TRANSIENT, ADJUSTABLE VERSION LINE TRANSIENT, ADJUSTABLE VERSION
Figure 29. Figure 30.
11
www.ti.com
APPLICATION INFORMATION
INPUT AND OUTPUT CAPACITOR
OUTPUT NOISE
TPS732xx
GNDEN NR
IN OUT
VIN VOUT
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional output capacitor.
May improve load transient,
noise, or PSRR.
Optional bypass
capacitor to reduce
output noise.
VN32VRMS (R1R2)
R2
32VRMS VOUT
VREF
(1)
TPS732xx
GNDEN FB
IN OUT
VIN VOUT
VOUT =×1.204
(R1+ R2)
R1CFB
R2
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional output capacitor.
May improve load transient,
noise, or PSRR.
Optional capacitor
reduces output noise.
R2
VN(VRMS)27VRMS
VVOUT(V)
(2)
VN(VRMS)8.5VRMS
VVOUT(V)
(3)
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
The TPS732xx belongs to a family of new generationLDO regulators that use an NMOS pass transistor to
REQUIREMENTSachieve ultra-low-dropout performance, reverse cur-rent blockage, and freedom from output capacitor
Although an input capacitor is not required for stab-constraints. These features, combined with low noise
ility, it is good analog design practice to connect aand an enable input, make the TPS732xx ideal for
0.1µF to 1µF low ESR capacitor across the inputportable applications. This regulator family offers a
supply near the regulator. This counteracts reactivewide selection of fixed output voltage versions and an
input sources and improves transient response, noiseadjustable output version. All versions have thermal
rejection, and ripple rejection. A higher-value capaci-and over-current protection, including foldback cur-
tor may be necessary if large, fast rise-time loadrent limit.
transients are anticipated or the device is locatedseveral inches from the power source.Figure 31 shows the basic circuit connections for thefixed voltage models. Figure 32 gives the connections
The TPS732xx does not require an output capacitorfor the adjustable output version (TPS73201).
for stability and has maximum phase margin with nocapacitor. It is designed to be stable for all availabletypes and values of capacitors. In applications whereV
IN
- V
OUT
< 0.5V and multiple low ESR capacitorsare in parallel, ringing may occur when the product ofC
OUT
and total ESR drops below 50n ΩF. Total ESRincludes all parasitic resistances, including capacitorESR and board, socket, and solder joint resistance.In most applications, the sum of capacitor ESR andtrace resistance will meet this requirement.
A precision band-gap reference is used to generatethe internal reference voltage, V
REF
. This reference isFigure 31. Typical Application Circuit for
the dominant noise source within the TPS732xx andFixed-Voltage Versions
it generates approximately 32µVRMS (10Hz to100kHz) at the reference output (NR). The regulatorcontrol loop gains up the reference noise with thesame gain as the reference voltage, so that the noisevoltage of the regulator is approximately given by:
Since the value of V
REF
is 1.2V, this relationshipreduces to:
Figure 32. Typical Application Circuit for
for the case of no C
NR
.Adjustable-Voltage Versions
An internal 27k Ωresistor in series with the noisereduction pin (NR) forms a low-pass filter for theR
1
and R
2
can be calculated for any output voltage
voltage reference when an external noise reductionusing the formula shown in Figure 32 . Sample re-
capacitor, C
NR
, is connected from NR to ground. Forsistor values for common output voltages are shown
C
NR
= 10nF, the total noise in the 10Hz to 100kHzin Figure 2 . For best accuracy, make the parallel
bandwidth is reduced by a factor of ~3.2, giving thecombination of R
1
and R
2
approximately 19k Ω.
approximate relationship:
for C
NR
= 10nF.
12
www.ti.com
DROPOUT VOLTAGE
BOARD LAYOUT RECOMMENDATION TO
TRANSIENT RESPONSEINTERNAL CURRENT LIMIT
SHUTDOWN
dVdt VOUT
COUT 80k
(4)
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
This noise reduction effect is shown as RMS NoiseVoltage vs C
NR
in the Typical Characteristics section.
The TPS732xx uses an NMOS pass transistor toThe TPS73201 adjustable version does not have the achieve extremely low dropout. When (V
IN
- V
OUT
) isnoise-reduction pin available. However, connecting a less than the dropout voltage (V
DO
), the NMOS passfeedback capacitor, C
FB
, from the output to the FB pin device is in its linear region of operation and thewill reduce output noise and improve load transient input-to-output resistance is the R
DS-ON
of the NMOSperformance. pass element.
The TPS732xx uses an internal charge pump to For large step changes in load current, the TPS732xxdevelop an internal supply voltage sufficient to drive requires a larger voltage drop from V
IN
to V
OUT
tothe gate of the NMOS pass element above V
OUT
. The avoid degraded transient response. The boundary ofcharge pump generates ~250µV of switching noise at this transient dropout region is approximately twice~2MHz; however, charge-pump noise contribution is the dc dropout. Values of V
IN
- V
OUT
above this linenegligible at the output of the regulator for most insure normal transient response.values of I
OUT
and C
OUT
.
Operating in the transient dropout region can causean increase in recovery time. The time required torecover from a load transient is a function of theIMPROVE PSRR AND NOISE PERFORMANCE
magnitude of the change in load current rate, the rateof change in load current, and the available head-To improve ac performance such as PSRR, output
room (V
IN
to V
OUT
voltage drop). Under worst-casenoise, and transient response, it is recommended that
conditions [full-scale instantaneous load change withthe PCB be designed with separate ground planes for
(V
IN
- V
OUT
) close to dc dropout levels], the TPS732xxV
IN
and V
OUT
, with each ground plane connected only
can take a couple of hundred microseconds to returnat the GND pin of the device. In addition, the ground
to the specified regulation accuracy.connection for the bypass capacitor should connectdirectly to the GND pin of the device.
The low open-loop output impedance provided by theNMOS pass element in a voltage follower configur-The TPS732xx internal current limit helps protect the
ation allows operation without an output capacitor forregulator during fault conditions. Foldback helps to
many applications. As with any regulator, the additionprotect the regulator from damage during output
of a capacitor (nominal value 1µF) from the output pinshort-circuit conditions by reducing current limit when
to ground will reduce undershoot magnitude butV
OUT
drops below 0.5V. See Figure 11 in the Typical
increase duration. In the adjustable version, theCharacteristics section for a graph of I
OUT
vs V
OUT
.
addition of a capacitor, C
FB
, from the output to theadjust pin will also improve the transient response.
The TPS732xx does not have active pull-down whenThe Enable pin is active high and is compatible with
the output is over-voltage. This allows applicationsstandard TTL-CMOS levels. V
EN
below 0.5V (max)
that connect higher voltage sources, such as alter-turns the regulator off and drops the ground pin
nate power supplies, to the output. This also resultscurrent to approximately 10nA. When shutdown capa-
in an output overshoot of several percent if the loadbility is not required, the Enable pin can be connected
current quickly drops to zero when a capacitor isto V
IN
. When a pull-up resistor is used, and operation
connected to the output. The duration of overshootdown to 1.8V is required, use pull-up resistor values
can be reduced by adding a load resistor. Thebelow 50 k Ω.
overshoot decays at a rate determined by outputcapacitor C
OUT
and the internal/external load resist-ance. The rate of decay is given by:
(Fixed voltage version)
13
www.ti.com
dVdt VOUT
COUT 80k(R1R2)
(5)
REVERSE CURRENT
POWER DISSIPATION
THERMAL PROTECTION
PD(VIN VOUT)IOUT
(6)
Package Mounting
TPS73201, TPS73215, TPS73216TPS73218, TPS73225, TPS73230TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
(Adjustable voltage version) reliability, thermal protection should trigger at least35 °C above the maximum expected ambient con-dition of your application. This produces a worst-casejunction temperature of 125 °C at the highest ex-pected ambient temperature and worst-case load.
The internal protection circuitry of the TPS732xx hasThe NMOS pass element of the TPS732xx provides
been designed to protect against overload conditions.inherent protection against current flow from the
It was not intended to replace proper heatsinking.output of the regulator to the input when the gate of
Continuously running the TPS732xx into thermalthe pass device is pulled low. To ensure that all
shutdown will degrade device reliability.charge is removed from the gate of the pass element,the enable pin must be driven low before the inputvoltage is removed. If this is not done, the pass
The ability to remove heat from the die is different forelement may be left on due to stored charge on the
each package type, presenting different consider-gate.
ations in the PCB layout. The PCB area around theAfter the enable pin is driven low, no bias voltage is
device that is free of other components moves theneeded on any pin for reverse current blocking. Note
heat from the device to the ambient air. Performancethat reverse current is specified as the current flowing
data for JEDEC low- and high-K boards are shown inout of the IN pin due to voltage applied on the OUT
the Power Dissipation Ratings table. Using heavierpin. There will be additional current flowing into the
copper will increase the effectiveness in removingOUT pin due to the 80k Ωinternal resistor divider to
heat from the device. The addition of platedground (see Figure 1 and Figure 2 ).
through-holes to heat-dissipating layers will also im-prove the heat-sink effectiveness.For the TPS73201, reverse current may flow whenV
FB
is more than 1.0V above V
IN
.
Power dissipation depends on input voltage and loadconditions. Power dissipation is equal to the productof the output current times the voltage drop acrossthe output pass element (V
IN
to V
OUT
):Thermal protection disables the output when thejunction temperature rises to approximately 160 °C,allowing the device to cool. When the junction tem-
Power dissipation can be minimized by using theperature cools to approximately 140 °C, the output
lowest possible input voltage necessary to assure thecircuitry is again enabled. Depending on power dissi-
required output voltage.pation, thermal resistance, and ambient temperature,the thermal protection circuit may cycle on and off.This limits the dissipation of the regulator, protectingit from damage due to overheating.
Solder pad footprint recommendations for theTPS732xx are presented in Application BulletinAny tendency to activate the thermal protection circuit
Solder Pad Recommendations for Surface-Mount De-indicates excessive power dissipation or an inad-
vices (AB-132), available from the Texas Instrumentsequate heatsink. For reliable operation, junction tem-
web site at www.ti.com.perature should be limited to 125 °C maximum. Toestimate the margin of safety in a complete design(including heatsink), increase the ambient tempera-ture until the thermal protection is triggered; useworst-case loads and signal conditions. For good
14
PACKAGING INFORMATION
ORDERABLE DEVICE STATUS(1) PACKAGE TYPE PACKAGE DRAWING PINS PACKAGE QTY
TPS73201DBVR ACTIVE SOP DBV 5 3000
TPS73201DBVT ACTIVE SOP DBV 5 250
TPS73201DCQ ACTIVE SOP DCQ 6 78
TPS73201DCQR ACTIVE SOP DCQ 6 2500
TPS73215DBVR ACTIVE SOP DBV 5 3000
TPS73215DBVT ACTIVE SOP DBV 5 250
TPS73215DCQ ACTIVE SOP DCQ 6 78
TPS73215DCQR ACTIVE SOP DCQ 6 2500
TPS73216DBVR ACTIVE SOP DBV 5 3000
TPS73216DBVT ACTIVE SOP DBV 5 250
TPS73218DBVR ACTIVE SOP DBV 5 3000
TPS73218DBVT ACTIVE SOP DBV 5 250
TPS73218DCQ ACTIVE SOP DCQ 6 78
TPS73218DCQR ACTIVE SOP DCQ 6 2500
TPS73225DBVR ACTIVE SOP DBV 5 3000
TPS73225DBVT ACTIVE SOP DBV 5 250
TPS73225DCQ ACTIVE SOP DCQ 6 78
TPS73225DCQR ACTIVE SOP DCQ 6 2500
TPS73230DBVR ACTIVE SOP DBV 5 3000
TPS73230DBVT ACTIVE SOP DBV 5 250
TPS73230DCQ ACTIVE SOP DCQ 6 78
TPS73230DCQR ACTIVE SOP DCQ 6 2500
TPS73233DBVR ACTIVE SOP DBV 5 3000
TPS73233DBVT ACTIVE SOP DBV 5 250
TPS73233DCQ ACTIVE SOP DCQ 6 78
TPS73233DCQR ACTIVE SOP DCQ 6 2500
TPS73250DBVR ACTIVE SOP DBV 5 3000
TPS73250DBVT ACTIVE SOP DBV 5 250
TPS73250DCQ ACTIVE SOP DCQ 6 78
TPS73250DCQR ACTIVE SOP DCQ 6 2500
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
PACKAGE OPTION ADDENDUM
www.ti.com 30-Sep-2004
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’ s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of T I products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Interface interface.ti.com Digital Control www.ti.com/digitalcontrol
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
Telephony www.ti.com/telephony
Video & Imaging www.ti.com/video
Wireless www.ti.com/wireless
Mailing Address: Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated